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| author | Andy Hu <andy.hu@starfivetech.com> | 2023-05-12 11:19:43 +0300 |
|---|---|---|
| committer | Andy Hu <andy.hu@starfivetech.com> | 2023-05-12 11:19:43 +0300 |
| commit | 09fd32c20bff99d19ad2ddef3983afa7df3c6693 (patch) | |
| tree | ce74cc317c0ae9e4d700f4f8f734b5d93af2c5ee | |
| parent | 77781526125544acc873b51959f19bbdb50a4f2e (diff) | |
| parent | 040cfd685cc90a3b93abf4b035589752ea18f113 (diff) | |
| download | u-boot-09fd32c20bff99d19ad2ddef3983afa7df3c6693.tar.xz | |
Merge tag 'JH7110_515_SDK_v4.9.0' into vf2-devel
1. u-boot:
Merge branch 'CR_5042_gmac_phy_delay_ds_samin.guo' into 'jh7110-master'
Merge branch 'CR_4854_nvboot_shanlong.li' into 'jh7110-master'
| -rw-r--r-- | configs/starfive_evb_defconfig | 2 | ||||
| -rw-r--r-- | drivers/net/phy/motorcomm.c | 22 | ||||
| -rw-r--r-- | include/configs/starfive-evb.h | 16 |
3 files changed, 37 insertions, 3 deletions
diff --git a/configs/starfive_evb_defconfig b/configs/starfive_evb_defconfig index eb851c8723..0982b1f578 100644 --- a/configs/starfive_evb_defconfig +++ b/configs/starfive_evb_defconfig @@ -28,7 +28,7 @@ CONFIG_SPI_BOOT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=tty1 console=ttyS0,115200 debug rootwait earlycon=sbi " CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="fatload mmc 0:3 $kernel_addr_r jh7110_uEnv.txt; env import -t $kernel_addr_r $filesize;run boot2" +CONFIG_BOOTCOMMAND="run mmcbootenv;run boot2" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="run chipa_set_uboot" CONFIG_LOG_MAX_LEVEL=4 diff --git a/drivers/net/phy/motorcomm.c b/drivers/net/phy/motorcomm.c index 20e2055117..94142a5a5a 100644 --- a/drivers/net/phy/motorcomm.c +++ b/drivers/net/phy/motorcomm.c @@ -40,6 +40,7 @@ #define YTPHY_SPEED_MODE 0xc000 #define YTPHY_SPEED_MODE_BIT 14 #define YTPHY_RGMII_SW_DR_MASK GENMASK(5, 4) +#define YTPHY_RGMII_RXC_DR_MASK GENMASK(15, 13) #define YT8521_EXT_CLK_GATE 0xc #define YT8521_EN_SLEEP_SW_BIT 15 @@ -73,6 +74,12 @@ struct ytphy_reg_field { const u8 dflt; /* Default value */ }; +static const struct ytphy_reg_field ytphy_dr_grp[] = { + { "rgmii_sw_dr", 2, 4, 0x3}, + { "rgmii_sw_dr_2", 1, 12, 0x0}, + { "rgmii_sw_dr_rxc", 3, 13, 0x3} +}; + static const struct ytphy_reg_field ytphy_rxtxd_grp[] = { { "rx_delay_sel", 4, 10, 0x0 }, { "tx_delay_sel_fe", 4, 4, 0xf }, @@ -228,9 +235,20 @@ static int ytphy_of_config(struct phy_device *phydev) ytphy_write_ext(phydev, YTPHY_EXTREG_CHIP_CONFIG, val); } - /* set drive strenght of rxd/rx_ctl rgmii pad */ val = ytphy_read_ext(phydev, YTPHY_PAD_DRIVES_STRENGTH_CFG); - val |= YTPHY_RGMII_SW_DR_MASK; + for (i = 0; i < ARRAY_SIZE(ytphy_dr_grp); i++) { + + cfg = ofnode_read_u32_default(node, + ytphy_dr_grp[i].name, ~0); + cfg = (cfg != -1) ? cfg : ytphy_dr_grp[i].dflt; + + /*check the cfg overflow or not*/ + cfg = (cfg > ((1 << ytphy_dr_grp[i].size) - 1)) ? + ((1 << ytphy_dr_grp[i].size) - 1) : cfg; + + val = bitfield_replace(val, ytphy_dr_grp[i].off, + ytphy_dr_grp[i].size, cfg); + } ytphy_write_ext(phydev, YTPHY_PAD_DRIVES_STRENGTH_CFG, val); val = ytphy_read_ext(phydev, YTPHY_EXTREG_RGMII_CONFIG1); diff --git a/include/configs/starfive-evb.h b/include/configs/starfive-evb.h index 82d0e842b9..5f856026d4 100644 --- a/include/configs/starfive-evb.h +++ b/include/configs/starfive-evb.h @@ -140,6 +140,21 @@ "run cpu_vol_1040_set;" \ "fi; \0" +#define EVB_BOOTENV_NVME \ + "sdev_cmd=mmc\0" \ + "sdev_blk=mmcblk0p4\0" \ + "scan_nvme_dev=" \ + "if pci enum; then " \ + "nvme scan; " \ + "echo pci enum ...;" \ + "fi; " \ + "if nvme dev; then " \ + "setenv sdev_cmd nvme;" \ + "setenv sdev_blk nvme0n1p4;" \ + "fi; \0" \ + "mmcbootenv=run scan_nvme_dev; " \ + "fatload ${sdev_cmd} 0:3 $kernel_addr_r jh7110_uEnv.txt; " \ + "env import -t $kernel_addr_r $filesize; \0" #define CHIPA_GMAC_SET \ "chipa_gmac_set=" \ @@ -176,6 +191,7 @@ "ramdisk_addr_r=0x46100000\0" \ CHIPA_GMAC_SET \ CHIPA_SET \ + EVB_BOOTENV_NVME \ CPU_VOL_1020_SET \ CPU_VOL_1040_SET \ CPU_VOL_1060_SET \ |