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| author | Michal Simek <michal.simek@xilinx.com> | 2021-07-01 20:01:42 +0300 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2021-07-26 10:18:45 +0300 |
| commit | 0c383a79577b95e745abe466fab5fd744887dec8 (patch) | |
| tree | 69085c01815f0e935f21a4d8eb68c5ddf6f0bfb4 | |
| parent | d036f4f2c6ee4dbddea67ad9bd5f8686b1f2d427 (diff) | |
| download | u-boot-0c383a79577b95e745abe466fab5fd744887dec8.tar.xz | |
clk: zynqmp: Add support for enabling clock on lpd_lsbus
lpd_lsbus is clock which is used by many IPs like dmas, gems, gpio, sdhcis,
spis, ttcs, uarts, watchdog that's why make sense to also enable access to
change this clock. For this clock you already get the rate.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| -rw-r--r-- | drivers/clk/clk_zynqmp.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/clk_zynqmp.c b/drivers/clk/clk_zynqmp.c index 13a623fdb9..52fecec7a7 100644 --- a/drivers/clk/clk_zynqmp.c +++ b/drivers/clk/clk_zynqmp.c @@ -813,6 +813,7 @@ static int zynqmp_clk_enable(struct clk *clk) mask = 0x3; break; case qspi_ref ... can1_ref: + case lpd_lsbus: clkact_shift = 24; mask = 0x1; break; |