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author | andy.hu <andy.hu@starfivetech.com> | 2022-12-19 07:04:34 +0300 |
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committer | andy.hu <andy.hu@starfivetech.com> | 2022-12-19 07:04:34 +0300 |
commit | 8a4e190ee227330d340324ea4c4277c702f2ae9b (patch) | |
tree | e8ba168684f314dfa662dec3c7406439e6c46088 | |
parent | 5d23c49f8e0f0e92e62cf87a6de06234219019bd (diff) | |
parent | 699c0a80340c59f6c68253966b0914cefd89baa2 (diff) | |
download | u-boot-8a4e190ee227330d340324ea4c4277c702f2ae9b.tar.xz |
Merge branch 'CR_2876_SET_CPU_FREQ_samin.guo' into 'jh7110-master'
CR_2876: board:starfive:evb: Set the CPU default frequency to 1.0GHz
See merge request sdk/u-boot!19
-rw-r--r-- | arch/riscv/cpu/jh7110/pll.c | 2 | ||||
-rw-r--r-- | board/starfive/evb/spl.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/riscv/cpu/jh7110/pll.c b/arch/riscv/cpu/jh7110/pll.c index decb0eede8..563259476a 100644 --- a/arch/riscv/cpu/jh7110/pll.c +++ b/arch/riscv/cpu/jh7110/pll.c @@ -279,7 +279,7 @@ static u64 pll_get_rate(enum starfive_pll_type pll, fbdiv = GET_PLL(PLL0, FBDIV); postdiv1 = 1 << GET_PLL(PLL0, POSTDIV1); frac = GET_PLL(PLL0, FRAC); - deffreq = 1250000000; + deffreq = 1000000000; break; case PLL1: diff --git a/board/starfive/evb/spl.c b/board/starfive/evb/spl.c index 8cab704031..8d07122719 100644 --- a/board/starfive/evb/spl.c +++ b/board/starfive/evb/spl.c @@ -61,8 +61,8 @@ void board_init_f(ulong dummy) { int ret; - /* Adjust cpu frequency, the default is 1.25GHz */ - starfive_jh7110_pll_set_rate(PLL0, 1250000000); + /* Set pll0 cpufreq to 1000M */ + starfive_jh7110_pll_set_rate(PLL0, 1000000000); /*change pll2 to 1188MHz*/ starfive_jh7110_pll_set_rate(PLL2, 1188000000); |