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author | Michal Simek <michal.simek@xilinx.com> | 2018-02-21 19:04:28 +0300 |
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committer | Michal Simek <michal.simek@xilinx.com> | 2018-03-23 11:34:43 +0300 |
commit | e6cc3b25d721c3001019f8b44bfaae2a57255162 (patch) | |
tree | 9a73e386de41b3816a5d2f34c7981e54930ce5d4 | |
parent | 42537ca4c890bb31ddf11a5cac578d5a2c81bf37 (diff) | |
download | u-boot-e6cc3b25d721c3001019f8b44bfaae2a57255162.tar.xz |
arm: zynq: Wire watchdog internals
Watchdog is only enabled in full u-boot. Adoption for SPL should be also
done because that's the right place where watchdog should be enabled.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-rw-r--r-- | arch/arm/Kconfig | 1 | ||||
-rw-r--r-- | board/xilinx/zynq/board.c | 49 |
2 files changed, 50 insertions, 0 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b8f7a982d9..166e3b73a4 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -762,6 +762,7 @@ config ARCH_ZYNQ select SUPPORT_SPL select OF_CONTROL select SPL_BOARD_INIT if SPL + select BOARD_EARLY_INIT_F if WDT select SPL_OF_CONTROL if SPL select DM select DM_ETH if NET diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index fb8eab07d7..838ac0f4c4 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -6,9 +6,11 @@ */ #include <common.h> +#include <dm/uclass.h> #include <fdtdec.h> #include <fpga.h> #include <mmc.h> +#include <wdt.h> #include <zynqpl.h> #include <asm/arch/hardware.h> #include <asm/arch/sys_proto.h> @@ -33,6 +35,22 @@ static xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45); static xilinx_desc fpga100 = XILINX_XC7Z100_DESC(0x100); #endif +#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) +static struct udevice *watchdog_dev; +#endif + +#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_BOARD_EARLY_INIT_F) +int board_early_init_f(void) +{ +# if defined(CONFIG_WDT) + /* bss is not cleared at time when watchdog_reset() is called */ + watchdog_dev = NULL; +# endif + + return 0; +} +#endif + int board_init(void) { #if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \ @@ -75,6 +93,15 @@ int board_init(void) } #endif +#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) + if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) { + puts("Watchdog: Not found!\n"); + } else { + wdt_start(watchdog_dev, 0, 0); + puts("Watchdog: Started\n"); + } +# endif + #if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \ (defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD)) fpga_init(); @@ -164,3 +191,25 @@ int dram_init(void) return 0; } #endif + +#if defined(CONFIG_WATCHDOG) +/* Called by macro WATCHDOG_RESET */ +void watchdog_reset(void) +{ +# if !defined(CONFIG_SPL_BUILD) + static ulong next_reset; + ulong now; + + if (!watchdog_dev) + return; + + now = timer_get_us(); + + /* Do not reset the watchdog too often */ + if (now > next_reset) { + wdt_reset(watchdog_dev); + next_reset = now + 1000; + } +# endif +} +#endif |