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authorLey Foon Tan <ley.foon.tan@intel.com>2021-04-26 06:35:05 +0300
committerPeng Fan <peng.fan@nxp.com>2021-06-22 07:02:11 +0300
commit8cb9d3ed3a6402f984356988c581546866acf0da (patch)
tree9f83ee05a0436e1b646992ef7233ad5669b02672
parent3a3672cc3769a43750dd9fea90ed7a7900cb227f (diff)
downloadu-boot-8cb9d3ed3a6402f984356988c581546866acf0da.tar.xz
mmc: dw_mmc: Fixes data read when receiving DTO interrupt in FIFO mode
The data read is not working when using FIFO mode. From DesignWare databook, when a Data_Transfer_Over (DTO) interrupt is received, the software should read the remaining data from FIFO. Add DTO interrupt checking on data read path and clear interrupts before start reading from FIFO. So, it doesn't clear the next pending interrupts unintentionally after read from FIFO. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
-rw-r--r--drivers/mmc/dw_mmc.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 7c8a312fa7..a949dad574 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -166,7 +166,9 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
if (host->fifo_mode && size) {
len = 0;
if (data->flags == MMC_DATA_READ &&
- (mask & DWMCI_INTMSK_RXDR)) {
+ (mask & (DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO))) {
+ dwmci_writel(host, DWMCI_RINTSTS,
+ DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO);
while (size) {
ret = dwmci_fifo_ready(host,
DWMCI_FIFO_EMPTY,
@@ -182,8 +184,6 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
dwmci_readl(host, DWMCI_DATA);
size = size > len ? (size - len) : 0;
}
- dwmci_writel(host, DWMCI_RINTSTS,
- DWMCI_INTMSK_RXDR);
} else if (data->flags == MMC_DATA_WRITE &&
(mask & DWMCI_INTMSK_TXDR)) {
while (size) {