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authorTom Rini <trini@konsulko.com>2022-12-13 00:32:37 +0300
committerTom Rini <trini@konsulko.com>2022-12-13 00:32:37 +0300
commit259420703b594c56844bc018e1c902484a3837aa (patch)
treee0410610f39b872e6c87e146df813857e6ef4fa3
parentbc71afc3c5399c062c724f01d6ff83af72e14a42 (diff)
parent178cbadb52f0c2809de6ded0f7b42fa7bb4e0e78 (diff)
downloadu-boot-259420703b594c56844bc018e1c902484a3837aa.tar.xz
Merge branch '2022-12-12-assorted-improvements' into next
- A number of PXE / sysboot related improvements - Nuvoton updates - Small updates to omap4, ARCH_OMAP2PLUS itself, mediatek pcie_designware.
Diffstat
-rw-r--r--arch/arm/dts/nuvoton-common-npcm8xx.dtsi92
-rw-r--r--arch/arm/dts/nuvoton-npcm7xx-u-boot.dtsi16
-rw-r--r--arch/arm/dts/nuvoton-npcm845-evb.dts129
-rw-r--r--arch/arm/dts/nuvoton-npcm845-pincfg.dtsi2007
-rw-r--r--arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi832
-rw-r--r--arch/arm/dts/omap4-u-boot.dtsi8
-rw-r--r--arch/arm/mach-omap2/boot-common.c16
-rw-r--r--board/ti/am335x/board.c9
-rw-r--r--board/ti/am43xx/board.c17
-rw-r--r--board/ti/am57xx/board.c17
-rw-r--r--board/ti/dra7xx/evm.c17
-rw-r--r--boot/pxe_utils.c74
-rw-r--r--configs/arbel_evb_defconfig17
-rw-r--r--configs/mt7981_emmc_rfb_defconfig1
-rw-r--r--configs/mt7981_rfb_defconfig1
-rw-r--r--configs/mt7981_sd_rfb_defconfig1
-rw-r--r--configs/mt7986_rfb_defconfig1
-rw-r--r--configs/mt7986a_bpir3_emmc_defconfig1
-rw-r--r--configs/mt7986a_bpir3_sd_defconfig1
-rw-r--r--doc/README.pxe8
-rw-r--r--drivers/pci/pcie_dw_common.c2
-rw-r--r--drivers/pci/pcie_dw_common.h1
-rw-r--r--include/pxe_utils.h2
23 files changed, 3161 insertions, 109 deletions
diff --git a/arch/arm/dts/nuvoton-common-npcm8xx.dtsi b/arch/arm/dts/nuvoton-common-npcm8xx.dtsi
index aa7aac8c37..4538345dda 100644
--- a/arch/arm/dts/nuvoton-common-npcm8xx.dtsi
+++ b/arch/arm/dts/nuvoton-common-npcm8xx.dtsi
@@ -4,6 +4,7 @@
#include <dt-bindings/clock/nuvoton,npcm845-clk.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
/ {
#address-cells = <2>;
@@ -60,6 +61,70 @@
reg = <0x0 0xf0801000 0x0 0x1000>;
};
+ sdhci0: sdhci@f0842000 {
+ compatible = "nuvoton,npcm845-sdhci";
+ reg = <0x0 0xf0842000 0x0 0x100>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM8XX_CLK_AHB>;
+ clock-names = "clk_mmc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc8_pins
+ &mmc_pins>;
+ status = "disabled";
+ };
+
+ fiu0: spi@fb000000 {
+ compatible = "nuvoton,npcm845-fiu";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0xfb000000 0x0 0x1000>,
+ <0x0 0x80000000 0x0 0x10000000>;
+ reg-names = "control", "memory";
+ clocks = <&clk NPCM8XX_CLK_SPI0>;
+ clock-names = "clk_ahb";
+ status = "disabled";
+ };
+
+ fiu1: spi@fb002000 {
+ compatible = "nuvoton,npcm845-fiu";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0xfb002000 0x0 0x1000>,
+ <0x0 0x90000000 0x0 0x4000000>;
+ reg-names = "control", "memory";
+ clocks = <&clk NPCM8XX_CLK_SPI1>;
+ clock-names = "clk_spi1";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins>;
+ status = "disabled";
+ };
+
+ fiu3: spi@c0000000 {
+ compatible = "nuvoton,npcm845-fiu";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0xc0000000 0x0 0x1000>,
+ <0x0 0xA0000000 0x0 0x20000000>;
+ reg-names = "control", "memory";
+ clocks = <&clk NPCM8XX_CLK_SPI3>;
+ clock-names = "clk_spi3";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi3_pins>;
+ status = "disabled";
+ };
+
+ fiux: spi@fb001000 {
+ compatible = "nuvoton,npcm845-fiu";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0xfb001000 0x0 0x1000>,
+ <0x0 0xf8000000 0x0 0x2000000>;
+ reg-names = "control", "memory";
+ clocks = <&clk NPCM8XX_CLK_SPIX>;
+ clock-names = "clk_ahb";
+ status = "disabled";
+ };
+
apb {
#address-cells = <1>;
#size-cells = <1>;
@@ -68,6 +133,19 @@
ranges = <0x0 0x0 0xf0000000 0x00300000>,
<0xfff00000 0x0 0xfff00000 0x00016000>;
+ spi1: spi@201000 {
+ compatible = "nuvoton,npcm845-pspi";
+ reg = <0x201000 0x1000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pspi_pins>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM8XX_CLK_APB5>;
+ clock-names = "clk_apb5";
+ status = "disabled";
+ };
+
timer0: timer@8000 {
compatible = "nuvoton,npcm845-timer";
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
@@ -165,6 +243,20 @@
clocks = <&clk NPCM8XX_CLK_REFCLK>;
syscon = <&gcr>;
};
+
+ i2c0: i2c@80000 {
+ compatible = "nuvoton,npcm845-i2c";
+ reg = <0x80000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk NPCM8XX_CLK_APB2>;
+ clock-frequency = <100000>;
+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb0_pins>;
+ syscon = <&gcr>;
+ status = "disabled";
+ };
};
};
};
diff --git a/arch/arm/dts/nuvoton-npcm7xx-u-boot.dtsi b/arch/arm/dts/nuvoton-npcm7xx-u-boot.dtsi
index c547e433e7..d54064091e 100644
--- a/arch/arm/dts/nuvoton-npcm7xx-u-boot.dtsi
+++ b/arch/arm/dts/nuvoton-npcm7xx-u-boot.dtsi
@@ -220,7 +220,7 @@
clocks = <&clk NPCM7XX_CLK_APB1>;
};
gpio_0: gpio0@10000 {
- compatible = "nuvoton,npcm-gpio";
+ compatible = "nuvoton,npcm-gpio", "nuvoton,npcm750-gpio";
reg = <0x10000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@@ -228,7 +228,7 @@
};
gpio_1: gpio1@11000 {
- compatible = "nuvoton,npcm-gpio";
+ compatible = "nuvoton,npcm-gpio", "nuvoton,npcm750-gpio";
reg = <0x11000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@@ -236,14 +236,14 @@
};
gpio_2: gpio2@12000 {
- compatible = "nuvoton,npcm-gpio";
+ compatible = "nuvoton,npcm-gpio", "nuvoton,npcm750-gpio";
reg = <0x12000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
gpio-bank-name = "gpio2";
};
gpio_3: gpio3@13000 {
- compatible = "nuvoton,npcm-gpio";
+ compatible = "nuvoton,npcm-gpio", "nuvoton,npcm750-gpio";
reg = <0x13000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@@ -251,7 +251,7 @@
};
gpio_4: gpio4@14000 {
- compatible = "nuvoton,npcm-gpio";
+ compatible = "nuvoton,npcm-gpio", "nuvoton,npcm750-gpio";
reg = <0x14000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@@ -259,7 +259,7 @@
};
gpio_5: gpio5@15000 {
- compatible = "nuvoton,npcm-gpio";
+ compatible = "nuvoton,npcm-gpio", "nuvoton,npcm750-gpio";
reg = <0x15000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@@ -267,14 +267,14 @@
};
gpio_6: gpio6@16000 {
- compatible = "nuvoton,npcm-gpio";
+ compatible = "nuvoton,npcm-gpio", "nuvoton,npcm750-gpio";
reg = <0x16000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
gpio-bank-name = "gpio6";
};
gpio_7: gpio7@17000 {
- compatible = "nuvoton,npcm-gpio";
+ compatible = "nuvoton,npcm-gpio", "nuvoton,npcm750-gpio";
reg = <0x17000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
diff --git a/arch/arm/dts/nuvoton-npcm845-evb.dts b/arch/arm/dts/nuvoton-npcm845-evb.dts
index a5ab2bc0f8..53f4c6aeca 100644
--- a/arch/arm/dts/nuvoton-npcm845-evb.dts
+++ b/arch/arm/dts/nuvoton-npcm845-evb.dts
@@ -3,6 +3,7 @@
/dts-v1/;
#include "nuvoton-npcm845.dtsi"
+#include "nuvoton-npcm845-pincfg.dtsi"
/ {
model = "Nuvoton npcm845 Development Board (Device Tree)";
@@ -10,6 +11,15 @@
aliases {
serial0 = &serial0;
+ i2c0 = &i2c0;
+ spi0 = &fiu0;
+ spi1 = &fiu1;
+ spi3 = &fiu3;
+ spi4 = &fiux;
+ spi5 = &spi1;
+ usb0 = &udc0;
+ usb1 = &ehci1;
+ usb2 = &ehci2;
};
chosen {
@@ -19,6 +29,31 @@
memory {
reg = <0x0 0x0 0x0 0x40000000>;
};
+
+ vsbr2: vsbr2 {
+ compatible = "regulator-npcm845";
+ regulator-name = "vr2";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ vsbv8: vsbv8 {
+ compatible = "regulator-npcm845";
+ regulator-name = "v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ vsbv5: vsbv5 {
+ compatible = "regulator-npcm845";
+ regulator-name = "v5";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
};
&serial0 {
@@ -28,3 +63,97 @@
&watchdog1 {
status = "okay";
};
+
+&fiu0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0cs1_pins>;
+ spi-nor@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+ };
+ spi_flash@1 {
+ compatible = "jedec,spi-nor";
+ reg = <1>;
+ spi-max-frequency = <25000000>;
+ };
+};
+
+&fiu1 {
+ status = "okay";
+ spi-nor@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+ };
+};
+
+&fiu3 {
+ pinctrl-0 = <&spi3_pins>, <&spi3quad_pins>;
+ status = "okay";
+ vqspi-supply = <&vsbv5>;
+ vqspi-microvolt = <3300000>;
+ spi-nor@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+ };
+};
+
+&fiux {
+ nuvoton,spix-mode;
+ status = "okay";
+};
+
+&spi1 {
+ status = "okay";
+};
+
+&usbphy1 {
+ status = "okay";
+};
+
+&usbphy2 {
+ status = "okay";
+};
+
+&usbphy3 {
+ status = "okay";
+};
+
+&udc0 {
+ status = "okay";
+ phys = <&usbphy1 0>;
+};
+
+&sdhci0 {
+ bus-width = <0x8>;
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+ phys = <&usbphy2 3>;
+};
+
+&ehci2 {
+ status = "okay";
+ phys = <&usbphy3 4>;
+};
+
+&i2c0 {
+ status = "okay";
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &gspi_pins
+ &vgadig_pins
+ &spix_pins
+ &r1_pins
+ &r1en_pins
+ &r1oen_pins
+ >;
+}; \ No newline at end of file
diff --git a/arch/arm/dts/nuvoton-npcm845-pincfg.dtsi b/arch/arm/dts/nuvoton-npcm845-pincfg.dtsi
new file mode 100644
index 0000000000..65de96b1f5
--- /dev/null
+++ b/arch/arm/dts/nuvoton-npcm845-pincfg.dtsi
@@ -0,0 +1,2007 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2021 Nuvoton Technology tomer.maimon@nuvoton.com
+
+/ {
+ pinctrl: pinctrl@f0800000 {
+ gpio0o_pins: gpio0o-pins {
+ pins = "GPIO0/IOX1_DI/SMB6C_SDA/SMB18_SDA";
+ bias-disable;
+ output-high;
+ };
+ gpio1_pins: gpio1-pins {
+ pins = "GPIO1/IOX1_LD/SMB6C_SCL/SMB18_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio2_pins: gpio2-pins {
+ pins = "GPIO2/IOX1_CK/SMB6B_SDA/SMB17_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio2o_pins: gpio2o-pins {
+ pins = "GPIO2/IOX1_CK/SMB6B_SDA/SMB17_SDA";
+ bias-disable;
+ output_high;
+ };
+ gpio3_pins: gpio3-pins {
+ pins = "GPIO3/IOX1_DO/SMB6B_SCL/SMB17_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio3o_pins: gpio3o-pins {
+ pins = "GPIO3/IOX1_DO/SMB6B_SCL/SMB17_SCL";
+ bias-disable;
+ output-high;
+ };
+ gpio4_pins: gpio4-pins {
+ pins = "GPIO4/IOX2_DI/SMB1D_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio5_pins: gpio5-pins {
+ pins = "GPIO5/IOX2_LD/SMB1D_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio6_pins: gpio6-pins {
+ pins = "GPIO6/IOX2_CK/SMB2D_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio6o_pins: gpio6o-pins {
+ pins = "GPIO6/IOX2_CK/SMB2D_SDA";
+ bias-disable;
+ output-high;
+ };
+ gpio6ol_pins: gpio6ol-pins {
+ pins = "GPIO6/IOX2_CK/SMB2D_SDA";
+ bias-disable;
+ output-low;
+ };
+ gpio7_pins: gpio7-pins {
+ pins = "GPIO7/IOX2_D0/SMB2D_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio7o_pins: gpio7o-pins {
+ pins = "GPIO7/IOX2_D0/SMB2D_SCL";
+ bias-disable;
+ output-high;
+ };
+ gpio7ol_pins: gpio7ol-pins {
+ pins = "GPIO7/IOX2_D0/SMB2D_SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio8_pins: gpio8-pins {
+ pins = "GPIO8/LKGPO1/TP_GPIO0";
+ bias-disable;
+ input-enable;
+ };
+ gpio8ol_pins: gpio8ol-pins {
+ pins = "GPIO8/LKGPO1/TP_GPIO0";
+ bias-disable;
+ output-low;
+ };
+ gpio9_pins: gpio9-pins {
+ pins = "GPIO9/LKGPO2/TP_GPIO1";
+ bias-disable;
+ input-enable;
+ };
+ gpio9o_pins: gpio9o-pins {
+ pins = "GPIO9/LKGPO2/TP_GPIO1";
+ bias-disable;
+ output-high;
+ };
+ gpio9ol_pins: gpio9ol-pins {
+ pins = "GPIO9/LKGPO2/TP_GPIO1";
+ bias-disable;
+ output-low;
+ };
+ gpio10_pins: gpio10-pins {
+ pins = "GPIO10/IOXH_LD/SMB6D_SCL/SMB16_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio10ol_pins: gpio10ol-pins {
+ pins = "GPIO10/IOXH_LD/SMB6D_SCL/SMB16_SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio11_pins: gpio11-pins {
+ pins = "GPIO11/IOXH_CK/SMB6D_SDA/SMB16_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio11o_pins: gpio11o-pins {
+ pins = "GPIO11/IOXH_CK/SMB6D_SDA/SMB16_SDA";
+ bias-disable;
+ output-high;
+ };
+ gpio11ol_pins: gpio11ol-pins {
+ pins = "GPIO11/IOXH_CK/SMB6D_SDA/SMB16_SDA";
+ bias-disable;
+ output-low;
+ };
+ gpio12_pins: gpio12-pins {
+ pins = "GPIO12/GSPI_CK/SMB5B_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio12o_pins: gpio12o-pins {
+ pins = "GPIO12/GSPI_CK/SMB5B_SCL";
+ bias-disable;
+ output-high;
+ };
+ gpio12ol_pins: gpio12ol-pins {
+ pins = "GPIO12/GSPI_CK/SMB5B_SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio13_pins: gpio13-pins {
+ pins = "GPIO13/GSPI_DO/SMB5B_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio13ol_pins: gpio13ol-pins {
+ pins = "GPIO13/GSPI_DO/SMB5B_SDA";
+ bias-disable;
+ output-low;
+ };
+ gpio14_pins: gpio14-pins {
+ pins = "GPIO14/GSPI_DI/SMB5C_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio14ol_pins: gpio14ol-pins {
+ pins = "GPIO14/GSPI_DI/SMB5C_SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio15_pins: gpio15-pins {
+ pins = "GPIO15/GSPI_CS/SMB5C_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio15o_pins: gpio15o-pins {
+ pins = "GPIO15/GSPI_CS/SMB5C_SDA";
+ bias-disable;
+ output-high;
+ };
+ gpio16_pins: gpio16-pins {
+ pins = "GPIO16/SMB7B_SDA/LKGPO0/TP_GPIO2";
+ bias-disable;
+ input-enable;
+ };
+ gpio16o_pins: gpio16o-pins {
+ pins = "GPIO16/SMB7B_SDA/LKGPO0/TP_GPIO2";
+ bias-disable;
+ output-high;
+ };
+ gpio16ol_pins: gpio16ol-pins {
+ pins = "GPIO16/SMB7B_SDA/LKGPO0/TP_GPIO2";
+ bias-disable;
+ output-low;
+ };
+ gpio17_pins: gpio17-pins {
+ pins = "GPIO17/PSPI_DI/CP1_GPIO5";
+ bias-disable;
+ input-enable;
+ };
+ gpio17o_pins: gpio17o-pins {
+ pins = "GPIO17/PSPI_DI/CP1_GPIO5";
+ bias-disable;
+ output-high;
+ };
+ gpio17ol_pins: gpio17ol-pins {
+ pins = "GPIO17/PSPI_DI/CP1_GPIO5";
+ bias-disable;
+ output-low;
+ };
+ gpio18_pins: gpio18-pins {
+ pins = "GPIO18/PSPI_D0/SMB4B_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio18ol_pins: gpio18ol-pins {
+ pins = "GPIO18/PSPI_D0/SMB4B_SDA";
+ bias-disable;
+ output-low;
+ };
+ gpio19_pins: gpio19-pins {
+ pins = "GPIO19/PSPI_CK/SMB4B_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio19ol_pins: gpio19ol-pins {
+ pins = "GPIO19/PSPI_CK/SMB4B_SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio20_pins: gpio20-pins {
+ pins = "GPIO20/H_GPIO0/SMB4C_SDA/SMB15_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio20o_pins: gpio20o-pins {
+ pins = "GPIO20/H_GPIO0/SMB4C_SDA/SMB15_SDA";
+ bias-disable;
+ output-high;
+ };
+ gpio20ol_pins: gpio20ol-pins {
+ pins = "GPIO20/H_GPIO0/SMB4C_SDA/SMB15_SDA";
+ bias-disable;
+ output-low;
+ };
+ gpio21_pins: gpio21-pins {
+ pins = "GPIO21/H_GPIO1/SMB4C_SCL/SMB15_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio21ol_pins: gpio21ol-pins {
+ pins = "GPIO21/H_GPIO1/SMB4C_SCL/SMB15_SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio22_pins: gpio22-pins {
+ pins = "GPIO22/H_GPIO2/SMB4D_SDA/SMB14_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio22ol_pins: gpio22ol-pins {
+ pins = "GPIO22/H_GPIO2/SMB4D_SDA/SMB14_SDA";
+ bias-disable;
+ output-low;
+ };
+ gpio23_pins: gpio23-pins {
+ pins = "GPIO23/H_GPIO3/SMB4D_SCL/SMB14_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio23ol_pins: gpio23ol-pins {
+ pins = "GPIO23/H_GPIO3/SMB4D_SCL/SMB14_SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio24_pins: gpio24-pins {
+ pins = "GPIO24/IOXH_DO/H_GPIO4/SMB7C_SCL/TP_SMB2_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio24o_pins: gpio24o-pins {
+ pins = "GPIO24/IOXH_DO/H_GPIO4/SMB7C_SCL/TP_SMB2_SCL";
+ bias-disable;
+ output-high;
+ };
+ gpio24ol_pins: gpio24ol-pins {
+ pins = "GPIO24/IOXH_DO/H_GPIO4/SMB7C_SCL/TP_SMB2_SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio25_pins: gpio25-pins {
+ pins = "GPIO25/IOXH_DI/H_GPIO4/SMB7C_SDA/TP_SMB2_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio25o_pins: gpio25o-pins {
+ pins = "GPIO25/IOXH_DI/H_GPIO4/SMB7C_SDA/TP_SMB2_SDA";
+ bias-disable;
+ output-high;
+ };
+ gpio25ol_pins: gpio25ol-pins {
+ pins = "GPIO25/IOXH_DI/H_GPIO4/SMB7C_SDA/TP_SMB2_SDA";
+ bias-disable;
+ output-low;
+ };
+ gpio26_pins: gpio26-pins {
+ pins = "GPIO26/SMB5_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio27_pins: gpio27-pins {
+ pins = "GPIO27/SMB5_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio32_pins: gpio32-pins {
+ pins = "GPIO32/SMB14_SCL/SPI0_nCS1";
+ bias-disable;
+ input-enable;
+ };
+ gpio32o_pins: gpio32o-pins {
+ pins = "GPIO32/SMB14_SCL/SPI0_nCS1";
+ bias-disable;
+ output-high;
+ };
+ gpio32ol_pins: gpio32ol-pins {
+ pins = "GPIO32/SMB14_SCL/SPI0_nCS1";
+ bias-disable;
+ output-low;
+ };
+ gpio37_pins: gpio37-pins {
+ pins = "GPIO37/SMB3C_SDA/SMB23_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio37o_pins: gpio37o-pins {
+ pins = "GPIO37/SMB3C_SDA/SMB23_SDA";
+ bias-disable;
+ output-high;
+ };
+ gpio37ol_pins: gpio37ol-pins {
+ pins = "GPIO37/SMB3C_SDA/SMB23_SDA";
+ bias-disable;
+ output-low;
+ };
+ gpio38_pins: gpio38-pins {
+ pins = "GPIO38/SMB3C_SCL/SMB23_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio38o_pins: gpio38o-pins {
+ pins = "GPIO38/SMB3C_SCL/SMB23_SCL";
+ bias-disable;
+ output-high;
+ };
+ gpio38ol_pins: gpio38ol-pins {
+ pins = "GPIO38/SMB3C_SCL/SMB23_SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio39_pins: gpio39-pins {
+ pins = "GPIO39/SMB3B_SDA/SMB22_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio39o_pins: gpio39o-pins {
+ pins = "GPIO39/SMB3B_SDA/SMB22_SDA";
+ bias-disable;
+ output-high;
+ };
+ gpio39ol_pins: gpio39ol-pins {
+ pins = "GPIO39/SMB3B_SDA/SMB22_SDA";
+ bias-disable;
+ output-low;
+ };
+ gpio40_pins: gpio40-pins {
+ pins = "GPIO40/SMB3B_SCL/SMB22_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio40o_pins: gpio40o-pins {
+ pins = "GPIO40/SMB3B_SCL/SMB22_SCL";
+ bias-disable;
+ output-high;
+ };
+ gpio40ol_pins: gpio40ol-pins {
+ pins = "GPIO40/SMB3B_SCL/SMB22_SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio41_pins: gpio41-pins {
+ pins = "GPIO41/BU0_RXD/CP1U_RXD";
+ input-enable;
+ };
+ gpio42_pins: gpio42-pins {
+ pins = "GPIO42/BU0_TXD/CP1U_TXD";
+ bias-disable;
+ input-enable;
+ };
+ gpio43_pins: gpio43-pins {
+ pins = "GPIO43/SI1_RXD/BU1_RXD";
+ bias-disable;
+ input-enable;
+ };
+ gpio44_pins: gpio44-pins {
+ pins = "GPIO44/SI1_nCTS/BU1_nCTS/CP_TDI/TP_TDI/CP_TP_TDI";
+ bias-disable;
+ input-enable;
+ };
+ gpio45_pins: gpio45-pins {
+ pins = "GPIO45/SI1_nDCD/CP_TMS_SWIO/TP_TMS_SWIO/CP_TP_TMS_SWIO";
+ bias-disable;
+ input-enable;
+ };
+ gpio46_pins: gpio46-pins {
+ pins = "GPIO46/SI1_nDSR/CP_TCK_SWCLK/TP_TCK_SWCLK/CP_TP_TCK_SWCLK";
+ bias-disable;
+ input-enable;
+ };
+ gpio47_pins: gpio47-pins {
+ pins = "GPIO47/SI1n_RI1";
+ bias-disable;
+ input-enable;
+ };
+ gpio48_pins: gpio48-pins {
+ pins = "GPIO48/SI2_TXD/BU0_TXD/STRAP5";
+ bias-disable;
+ input-enable;
+ };
+ gpio49_pins: gpio49-pins {
+ pins = "GPIO49/SI2_RXD/BU0_RXD";
+ bias-disable;
+ input-enable;
+ };
+ gpio50_pins: gpio50-pins {
+ pins = "GPIO50/SI2_nCTS/BU6_TXD/TPU_TXD";
+ bias-disable;
+ input-enable;
+ };
+ gpio50ol_pins: gpio50ol-pins {
+ pins = "GPIO50/SI2_nCTS/BU6_TXD/TPU_TXD";
+ bias-disable;
+ output-low;
+ };
+ gpio51_pins: gpio51-pins {
+ pins = "GPIO51/SI2_nRTS/BU6_RXD/TPU_RXD";
+ bias-disable;
+ input-enable;
+ };
+ gpio51o_pins: gpio51o-pins {
+ pins = "GPIO51/SI2_nRTS/BU6_RXD/TPU_RXD";
+ bias-disable;
+ output-high;
+ };
+ gpio52_pins: gpio52-pins {
+ pins = "GPIO52/SI2_nDCD/BU5_RXD";
+ bias-disable;
+ input-enable;
+ };
+ gpio52ol_pins: gpio52ol-pins {
+ pins = "GPIO52/SI2_nDCD/BU5_RXD";
+ bias-disable;
+ output-low;
+ };
+ gpio53_pins: gpio53-pins {
+ pins = "GPIO53/SI2_nDTR_BOUT2/BU5_TXD";
+ bias-disable;
+ input-enable;
+ };
+ gpio53o_pins: gpio53o-pins {
+ pins = "GPIO53/SI2_nDTR_BOUT2/BU5_TXD";
+ bias-disable;
+ output-high;
+ };
+ gpio54_pins: gpio54-pins {
+ pins = "GPIO54/SI2_nDSR/BU4_TXD";
+ bias-disable;
+ input-enable;
+ };
+ gpio54ol_pins: gpio54ol-pins {
+ pins = "GPIO54/SI2_nDSR/BU4_TXD";
+ bias-disable;
+ output-low;
+ };
+ gpio55_pins: gpio55-pins {
+ pins = "GPIO55/SI2_RI2/BU4_RXD";
+ bias-disable;
+ input-enable;
+ };
+ gpio55ol_pins: gpio55ol-pins {
+ pins = "GPIO55/SI2_RI2/BU4_RXD";
+ bias-disable;
+ output-low;
+ };
+ gpio56_pins: gpio56-pins {
+ pins = "GPIO56/R1_RXERR/R1_OEN";
+ bias-disable;
+ input-enable;
+ };
+ gpio57_pins: gpio57-pins {
+ pins = "GPIO57/R1_MDC/TP_GPIO4";
+ bias-disable;
+ input-enable;
+ };
+ gpio57ol_pins: gpio57ol-pins {
+ pins = "GPIO57/R1_MDC/TP_GPIO4";
+ bias-disable;
+ output-low;
+ };
+ gpio58_pins: gpio58-pins {
+ pins = "GPIO58/R1_MDIO/TP_GPIO5";
+ bias-disable;
+ input-enable;
+ };
+ gpio58ol_pins: gpio58ol-pins {
+ pins = "GPIO58/R1_MDIO/TP_GPIO5";
+ bias-disable;
+ output-low;
+ };
+ gpio59_pins: gpio59-pins {
+ pins = "GPIO59/H_GPIO06/SMB3D_SDA/SMB19_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio59o_pins: gpio59o-pins {
+ pins = "GPIO59/H_GPIO06/SMB3D_SDA/SMB19_SDA";
+ bias-disable;
+ output-high;
+ };
+ gpio59ol_pins: gpio59ol-pins {
+ pins = "GPIO59/H_GPIO06/SMB3D_SDA/SMB19_SDA";
+ bias-disable;
+ output-low;
+ };
+ gpio60_pins: gpio60-pins {
+ pins = "GPIO60/H_GPIO07/SMB3D_SCL/SMB19_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio60o_pins: gpio60o-pins {
+ pins = "GPIO60/H_GPIO07/SMB3D_SCL/SMB19_SCL";
+ bias-disable;
+ output-high;
+ };
+ gpio60ol_pins: gpio60ol-pins {
+ pins = "GPIO60/H_GPIO07/SMB3D_SCL/SMB19_SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio61_pins: gpio61-pins {
+ pins = "GPIO61/SI1_nDTR_BOUT";
+ bias-disable;
+ input-enable;
+ };
+ gpio61o_pins: gpio61o-pins {
+ pins = "GPIO61/SI1_nDTR_BOUT";
+ bias-disable;
+ output-high;
+ };
+ gpio62_pins: gpio62-pins {
+ pins = "GPIO62/SI1_nRTS/BU1_nRTS/CP_TDO_SWO/TP_TDO_SWO/CP_TP_TDO_SWO";
+ bias-disable;
+ input-enable;
+ };
+ gpio62o_pins: gpio62o-pins {
+ pins = "GPIO62/SI1_nRTS/BU1_nRTS/CP_TDO_SWO/TP_TDO_SWO/CP_TP_TDO_SWO";
+ bias-disable;
+ output-high;
+ };
+ gpio63_pins: gpio63-pins {
+ pins = "GPIO63/BU1_TXD1/SI1_TXD";
+ bias-disable;
+ input-enable;
+ };
+ gpio63o_pins: gpio63o-pins {
+ pins = "GPIO63/BU1_TXD1/SI1_TXD";
+ bias-disable;
+ output-high;
+ };
+ gpio64_pins: gpio64-pins {
+ pins = "GPIO64/FANIN0";
+ bias-disable;
+ input-enable;
+ };
+ gpio64o_pins: gpio64o-pins {
+ pins = "GPIO64/FANIN0";
+ bias-disable;
+ output-high;
+ };
+ gpio65_pins: gpio65-pins {
+ pins = "GPIO65/FANIN1";
+ bias-disable;
+ input-enable;
+ };
+ gpio66_pins: gpio66-pins {
+ pins = "GPIO66/FANIN2";
+ bias-disable;
+ input-enable;
+ };
+ gpio67_pins: gpio67-pins {
+ pins = "GPIO67/FANIN3";
+ bias-disable;
+ input-enable;
+ };
+ gpio68_pins: gpio68-pins {
+ pins = "GPIO68/FANIN4";
+ bias-disable;
+ input-enable;
+ };
+ gpio68o_pins: gpio68o-pins {
+ pins = "GPIO68/FANIN4";
+ bias-disable;
+ output-high;
+ };
+ gpio69_pins: gpio69-pins {
+ pins = "GPIO69/FANIN5";
+ bias-disable;
+ input-enable;
+ };
+ gpio69o_pins: gpio69o-pins {
+ pins = "GPIO69/FANIN5";
+ bias-disable;
+ output-high;
+ };
+ gpio69ol_pins: gpio69ol-pins {
+ pins = "GPIO69/FANIN5";
+ bias-disable;
+ output-low;
+ };
+ gpio70_pins: gpio70-pins {
+ pins = "GPIO70/FANIN6";
+ bias-disable;
+ input-enable;
+ };
+ gpio70o_pins: gpio70o-pins {
+ pins = "GPIO70/FANIN6";
+ bias-disable;
+ output-high;
+ };
+ gpio71_pins: gpio71-pins {
+ pins = "GPIO71/FANIN7";
+ bias-disable;
+ input-enable;
+ };
+ gpio72_pins: gpio72-pins {
+ pins = "GPIO72/FANIN8";
+ bias-disable;
+ input-enable;
+ };
+ gpio72ol_pins: gpio72ol-pins {
+ pins = "GPIO72/FANIN8";
+ bias-disable;
+ output-low;
+ };
+ gpio73_pins: gpio73-pins {
+ pins = "GPIO73/FANIN9";
+ bias-disable;
+ input-enable;
+ };
+ gpio73ol_pins: gpio73ol-pins {
+ pins = "GPIO73/FANIN9";
+ bias-disable;
+ output-low;
+ };
+ gpio74_pins: gpio74-pins {
+ pins = "GPIO74/FANIN10";
+ bias-disable;
+ input-enable;
+ };
+ gpio74ol_pins: gpio74ol-pins {
+ pins = "GPIO74/FANIN10";
+ bias-disable;
+ output-low;
+ };
+ gpio75_pins: gpio75-pins {
+ pins = "GPIO75/FANIN11";
+ bias-disable;
+ input-enable;
+ };
+ gpio75ol_pins: gpio75ol-pins {
+ pins = "GPIO75/FANIN11";
+ bias-disable;
+ output-low;
+ };
+ gpio76_pins: gpio76-pins {
+ pins = "GPIO76/FANIN12";
+ bias-disable;
+ input-enable;
+ };
+ gpio76ol_pins: gpio76ol-pins {
+ pins = "GPIO76/FANIN12";
+ bias-disable;
+ output-low;
+ };
+ gpio77_pins: gpio77-pins {
+ pins = "GPIO77/FANIN13";
+ bias-disable;
+ input-enable;
+ };
+ gpio77ol_pins: gpio77ol-pins {
+ pins = "GPIO77/FANIN13";
+ bias-disable;
+ output-low;
+ };
+ gpio78_pins: gpio78-pins {
+ pins = "GPIO78/FANIN14";
+ bias-disable;
+ input-enable;
+ };
+ gpio78ol_pins: gpio78ol-pins {
+ pins = "GPIO78/FANIN14";
+ bias-disable;
+ output-low;
+ };
+ gpio79_pins: gpio79-pins {
+ pins = "GPIO79/FANIN15";
+ bias-disable;
+ input-enable;
+ };
+ gpio79ol_pins: gpio79ol-pins {
+ pins = "GPIO79/FANIN15";
+ bias-disable;
+ output-low;
+ };
+ gpio80_pins: gpio80-pins {
+ pins = "GPIO80/PWM0";
+ bias-disable;
+ input-enable;
+ };
+ gpio81_pins: gpio81-pins {
+ pins = "GPIO81/PWM1";
+ bias-disable;
+ input-enable;
+ };
+ gpio82_pins: gpio82-pins {
+ pins = "GPIO82/PWM2";
+ bias-disable;
+ input-enable;
+ };
+ gpio83_pins: gpio83-pins {
+ pins = "GPIO83/PWM3";
+ bias-disable;
+ input-enable;
+ };
+ gpio84_pins: gpio84-pins {
+ pins = "GPIO84/R2_TXD0";
+ bias-disable;
+ input-enable;
+ };
+ gpio84o_pins: gpio84ol-pins {
+ pins = "GPIO84/R2_TXD0";
+ bias-disable;
+ output-high;
+ };
+ gpio85_pins: gpio85-pins {
+ pins = "GPIO85/R2_TXD1";
+ bias-disable;
+ input-enable;
+ };
+ gpio85o_pins: gpio85o-pins {
+ pins = "GPIO85/R2_TXD1";
+ bias-disable;
+ output-high;
+ };
+ gpio86_pins: gpio86-pins {
+ pins = "GPIO86/R2_TXEN";
+ bias-disable;
+ input-enable;
+ };
+ gpio86o_pins: gpio86o-pins {
+ pins = "GPIO86/R2_TXEN";
+ bias-disable;
+ output-high;
+ };
+ gpio87_pins: gpio87-pins {
+ pins = "GPIO87/R2_RXD0";
+ bias-disable;
+ input-enable;
+ };
+ gpio87o_pins: gpio87o-pins {
+ pins = "GPIO87/R2_RXD0";
+ bias-disable;
+ output-high;
+ };
+ gpio88_pins: gpio88-pins {
+ pins = "GPIO88/R2_RXD1";
+ bias-disable;
+ input-enable;
+ };
+ gpio88ol_pins: gpio88ol-pins {
+ pins = "GPIO88/R2_RXD1";
+ bias-disable;
+ output-low;
+ };
+ gpio89_pins: gpio89-pins {
+ pins = "GPIO89/R2_CRSDV";
+ bias-disable;
+ input-enable;
+ };
+ gpio89ol_pins: gpio89ol-pins {
+ pins = "GPIO89/R2_CRSDV";
+ bias-disable;
+ output-low;
+ };
+ gpio90_pins: gpio90-pins {
+ pins = "GPIO90/R2_RXERR/R2_OEN";
+ bias-disable;
+ input-enable;
+ };
+ gpio90o_pins: gpio90o0-pins {
+ pins = "GPIO90/R2_RXERR/R2_OEN";
+ bias-disable;
+ output-high;
+ };
+ gpio90ol_pins: gpio90ol-pins {
+ pins = "GPIO90/R2_RXERR/R2_OEN";
+ bias-disable;
+ output-low;
+ };
+ gpio91_pins: gpio91-pins {
+ pins = "GPIO91/R2_MDC/CP1_GPIO6/TP_GPIO0";
+ bias-disable;
+ input-enable;
+ };
+ gpio91o_pins: gpio91o-pins {
+ pins = "GPIO91/R2_MDC/CP1_GPIO6/TP_GPIO0";
+ bias-disable;
+ output-high;
+ };
+ gpio91ol_pins: gpio91ol-pins {
+ pins = "GPIO91/R2_MDC/CP1_GPIO6/TP_GPIO0";
+ bias-disable;
+ output-low;
+ };
+ gpio92_pins: gpio92-pins {
+ pins = "GPIO92/R2_MDIO/CP1_GPIO7/TP_GPIO1";
+ bias-disable;
+ input-enable;
+ };
+ gpio92o_pins: gpio92o-pins {
+ pins = "GPIO92/R2_MDIO/CP1_GPIO7/TP_GPIO1";
+ bias-disable;
+ output-high;
+ };
+ gpio92ol_pins: gpio92ol-pins {
+ pins = "GPIO92/R2_MDIO/CP1_GPIO7/TP_GPIO1";
+ bias-disable;
+ output-low;
+ };
+ gpio93_pins: gpio93-pins {
+ pins = "GPIO93/GA20/SMB5D_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio93o_pins: gpio93o-pins {
+ pins = "GPIO93/GA20/SMB5D_SCL";
+ bias-disable;
+ output-high;
+ };
+ gpio93ol_pins: gpio93ol-pins {
+ pins = "GPIO93/GA20/SMB5D_SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio94_pins: gpio94-pins {
+ pins = "GPIO94/nKBRST/SMB5D_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio94o_pins: gpio94o-pins {
+ pins = "GPIO94/nKBRST/SMB5D_SDA";
+ bias-disable;
+ output-high;
+ };
+ gpio95_pins: gpio95-pins {
+ pins = "GPIO95/nESPIRST/LPC_nLRESET";
+ bias-disable;
+ input-enable;
+ };
+ gpio96_pins: gpio96-pins {
+ pins = "GPIO96/CP1_GPIO7/BU2_TXD/TP_GPIO7";
+ bias-disable;
+ input-enable;
+ };
+ gpio96ol_pins: gpio96ol-pins {
+ pins = "GPIO96/CP1_GPIO7/BU2_TXD/TP_GPIO7";
+ bias-disable;
+ output-low;
+ };
+ gpio97_pins: gpio97-pins {
+ pins = "GPIO97/CP1_GPIO6/BU2_RXD/TP_GPIO6";
+ bias-disable;
+ input-enable;
+ };
+ gpio97ol_pins: gpio97ol-pins {
+ pins = "GPIO97/CP1_GPIO6/BU2_RXD/TP_GPIO6";
+ bias-disable;
+ output-low;
+ };
+ gpio98_pins: gpio98-pins {
+ pins = "GPIO98/CP1_GPIO5/BU4_TXD/TP_GPIO5";
+ bias-disable;
+ input-enable;
+ };
+ gpio98o_pins: gpio98o-pins {
+ pins = "GPIO98/RG1TXD2";
+ bias-disable;
+ output-high;
+ };
+ gpio98ol_pins: gpio98ol-pins {
+ pins = "GPIO98/CP1_GPIO5/BU4_TXD/TP_GPIO5";
+ bias-disable;
+ output-low;
+ };
+ gpio99_pins: gpio99-pins {
+ pins = "GPIO99/CP1_GPIO4/BU4_RXD/TP_GPIO4";
+ bias-disable;
+ input-enable;
+ };
+ gpio99o_pins: gpio99o-pins {
+ pins = "GPIO99/RG1TXD3";
+ bias-disable;
+ output-high;
+ };
+ gpio99ol_pins: gpio99ol-pins {
+ pins = "GPIO99/CP1_GPIO4/BU4_RXD/TP_GPIO4";
+ bias-disable;
+ output-low;
+ };
+ gpio100_pins: gpio100-pins {
+ pins = "GPIO100/CP1_GPIO3/BU5_TXD/TP_GPIO3";
+ bias-disable;
+ input-enable;
+ };
+ gpio100ol_pins: gpio100ol-pins {
+ pins = "GPIO100/CP1_GPIO3/BU5_TXD/TP_GPIO3";
+ bias-disable;
+ output-low;
+ };
+ gpio101_pins: gpio101-pins {
+ pins = "GPIO101/CP1_GPIO2/BU5_RXD/TP_GPIO2";
+ bias-disable;
+ input-enable;
+ };
+ gpio101ol_pins: gpio101ol-pins {
+ pins = "GPIO101/CP1_GPIO2/BU5_RXD/TP_GPIO2";
+ bias-disable;
+ output-low;
+ };
+ gpio102_pins: gpio102-pins {
+ pins = "GPIO102/HSYNC";
+ bias-disable;
+ input-enable;
+ };
+ gpio102ol_pins: gpio102ol-pins {
+ pins = "GPIO102/HSYNC";
+ bias-disable;
+ output-low;
+ };
+ gpio103_pins: gpio103-pins {
+ pins = "GPIO103/VSYNC";
+ bias-disable;
+ input-enable;
+ };
+ gpio103ol_pins: gpio103ol-pins {
+ pins = "GPIO103/VSYNC";
+ bias-disable;
+ output-low;
+ };
+ gpio104_pins: gpio104-pins {
+ pins = "GPIO104/DDC_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio104ol_pins: gpio104ol-pins {
+ pins = "GPIO104/DDC_SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio105_pins: gpio105-pins {
+ pins = "GPIO105/DDC_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio105ol_pins: gpio105ol-pins {
+ pins = "GPIO105/DDC_SDA";
+ bias-disable;
+ output-low;
+ };
+ gpio106_pins: gpio106-pins {
+ pins = "GPIO106/I3C5_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio106ol_pins: gpio106ol-pins {
+ pins = "GPIO106/I3C5_SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio107_pins: gpio107-pins {
+ pins = "GPIO107/I3C5_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio107ol_pins: gpio107ol-pins {
+ pins = "GPIO107/I3C5_SDA";
+ bias-disable;
+ output-low;
+ };
+ gpio108_pins: gpio108-pins {
+ pins = "GPIO108/SG1_MDC";
+ bias-disable;
+ input-enable;
+ };
+ gpio108ol_pins: gpio108ol-pins {
+ pins = "GPIO108/SG1_MDC";
+ bias-disable;
+ output-low;
+ };
+ gpio109_pins: gpio109-pins {
+ pins = "GPIO109/SG1_MDIO";
+ bias-disable;
+ input-enable;
+ };
+ gpio109ol_pins: gpio109ol-pins {
+ pins = "GPIO109/SG1_MDIO";
+ bias-disable;
+ output-low;
+ };
+ gpio110_pins: gpio110-pins {
+ pins = "GPIO110/RG2_TXD0/DDRV0/R3_TXD0";
+ bias-disable;
+ input-enable;
+ };
+ gpio110ol_pins: gpio110ol-pins {
+ pins = "GPIO110/RG2_TXD0/DDRV0/R3_TXD0";
+ bias-disable;
+ output-low;
+ };
+ gpio111_pins: gpio111-pins {
+ pins = "GPIO111/RG2_TXD1/DDRV1/R3_TXD1";
+ bias-disable;
+ input-enable;
+ };
+ gpio111ol_pins: gpio111ol-pins {
+ pins = "GPIO111/RG2_TXD1/DDRV1/R3_TXD1";
+ bias-disable;
+ output-low;
+ };
+ gpio112_pins: gpio112-pins {
+ pins = "GPIO112/RG2_TXD2/DDRV2";
+ bias-disable;
+ input-enable;
+ };
+ gpio112ol_pins: gpio112ol-pins {
+ pins = "GPIO112/RG2_TXD2/DDRV2";
+ bias-disable;
+ output-low;
+ };
+ gpio113_pins: gpio113-pins {
+ pins = "GPIO113/RG2_TXD3/DDRV3";
+ bias-disable;
+ input-enable;
+ };
+ gpio113ol_pins: gpio113ol-pins {
+ pins = "GPIO113/RG2_TXD3/DDRV3";
+ bias-disable;
+ output-low;
+ };
+ gpio118_pins: gpio118-pins {
+ pins = "GPIO118/SMB2_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio119_pins: gpio119-pins {
+ pins = "GPIO119/SMB2_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio120_pins: gpio120-pins {
+ pins = "GPIO120/SMB2C_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio120ol_pins: gpio120ol-pins {
+ pins = "GPIO120/SMB2C_SDA";
+ bias-disable;
+ output-low;
+ };
+ gpio121_pins: gpio121-pins {
+ pins = "GPIO121/SMB2C_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio122_pins: gpio122-pins {
+ pins = "GPIO122/SMB2B_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio123_pins: gpio123-pins {
+ pins = "GPIO123/SMB2B_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio123_pins: gpio123-pins {
+ pins = "GPIO123/SMB2B_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio124_pins: gpio124-pins {
+ pins = "GPIO124/SMB1C_SDA/CP1_GPIO3";
+ bias-disable;
+ input-enable;
+ };
+ gpio125_pins: gpio125-pins {
+ pins = "GPIO125/SMB1C_SCL/CP1_GPIO2";
+ bias-disable;
+ input-enable;
+ };
+ gpio126_pins: gpio126-pins {
+ pins = "GPIO126/SMB1B_SDA/CP1_GPIO1";
+ bias-disable;
+ input-enable;
+ };
+ gpio127_pins: gpio127-pins {
+ pins = "GPIO127/SMB1B_SCL/CP1_GPIO0";
+ bias-disable;
+ input-enable;
+ };
+ gpio128o_pins: gpio128o-pins {
+ pins = "GPIO128/SMB824_SCL";
+ bias-disable;
+ output-high;
+ };
+ gpio130_pins: gpio130-pins {
+ pins = "GPIO130/SMB925_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio131_pins: gpio131-pins {
+ pins = "GPIO131/SMB925_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio132_pins: gpio132-pins {
+ pins = "GPIO132/SMB1026_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio133_pins: gpio133-pins {
+ pins = "GPIO133/SMB1026_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio134_pins: gpio134-pins {
+ pins = "GPIO134/SMB11_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio135_pins: gpio135-pins {
+ pins = "GPIO135/SMB11_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio136_pins: gpio136-pins {
+ pins = "GPIO136/JM1_TCK";
+ bias-disable;
+ input-enable;
+ };
+ gpio136o_pins: gpio136o-pins {
+ pins = "GPIO136/JM1_TCK";
+ bias-disable;
+ output-high;
+ };
+ gpio137_pins: gpio137-pins {
+ pins = "GPIO137/JM1_TDO";
+ bias-disable;
+ input-enable;
+ };
+ gpio137o_pins: gpio137o-pins {
+ pins = "GPIO137/JM1_TDO";
+ bias-disable;
+ output-high;
+ };
+ gpio138_pins: gpio138-pins {
+ pins = "GPIO138/JM1_TMS";
+ bias-disable;
+ input-enable;
+ };
+ gpio138o_pins: gpio138o-pins {
+ pins = "GPIO138/JM1_TMS";
+ bias-disable;
+ output-high;
+ };
+ gpio139_pins: gpio139-pins {
+ pins = "GPIO139/JM1_TDI";
+ bias-disable;
+ input-enable;
+ };
+ gpio139o_pins: gpio139o-pins {
+ pins = "GPIO139/JM1_TDI";
+ bias-disable;
+ output-high;
+ };
+ gpio140_pins: gpio140-pins {
+ pins = "GPIO140/JM1_nTRST";
+ bias-disable;
+ input-enable;
+ };
+ gpio140o_pins: gpio140o-pins {
+ pins = "GPIO140/JM1_nTRST";
+ bias-disable;
+ output-high;
+ };
+ gpio141_pins: gpio141-pins {
+ pins = "GPIO141/SMB7B_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio141o_pins: gpio141o-pins {
+ pins = "GPIO141/SMB7B_SCL";
+ bias-disable;
+ output-high;
+ };
+ gpio141ol_pins: gpio141ol-pins {
+ pins = "GPIO141/SMB7B_SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio142_pins: gpio142-pins {
+ pins = "GPIO142/SMB7D_SCL/TPSMB1_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio142o_pins: gpio142o-pins {
+ pins = "GPIO142/SMB7D_SCL/TPSMB1_SCL";
+ bias-disable;
+ output-high;
+ };
+ gpio143_pins: gpio143-pins {
+ pins = "GPIO143/SMB7D_SDA/TPSMB1_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio143o_pins: gpio143o-pins {
+ pins = "GPIO143/SMB7D_SDA/TPSMB1_SDA";
+ bias-disable;
+ output-high;
+ };
+ gpio143ol_pins: gpio143ol-pins {
+ pins = "GPIO143/SMB7D_SDA/TPSMB1_SDA";
+ bias-disable;
+ output-low;
+ };
+ gpio144_pins: gpio144-pins {
+ pins = "GPIO144/PWM4";
+ bias-disable;
+ input-enable;
+ };
+ gpio145_pins: gpio145-pins {
+ pins = "GPIO145/PWM5";
+ bias-disable;
+ input-enable;
+ };
+ gpio146_pins: gpio146-pins {
+ pins = "GPIO146/PWM6";
+ bias-disable;
+ input-enable;
+ };
+ gpio147_pins: gpio147-pins {
+ pins = "GPIO147/PWM7";
+ bias-disable;
+ input-enable;
+ };
+ gpio148_pins: gpio148-pins {
+ pins = "GPIO148/MMC_DT4";
+ bias-disable;
+ input-enable;
+ };
+ gpio148o_pins: gpio148o-pins {
+ pins = "GPIO148/MMC_DT4";
+ bias-disable;
+ output-high;
+ };
+ gpio148ol_pins: gpio148ol_pins {
+ pins = "GPIO148/MMC_DT4";
+ bias-disable;
+ output-low;
+ };
+ gpio149_pins: gpio149-pins {
+ pins = "GPIO149/MMC_DT5";
+ bias-disable;
+ input-enable;
+ };
+ gpio149o_pins: gpio149o-pins {
+ pins = "GPIO149/MMC_DT5";
+ bias-disable;
+ output-high;
+ };
+ gpio149ol_pins: gpio149ol-pins {
+ pins = "GPIO149/MMC_DT5";
+ bias-disable;
+ output-low;
+ };
+ gpio150_pins: gpio150-pins {
+ pins = "GPIO150/MMC_DT6";
+ bias-disable;
+ input-enable;
+ };
+ gpio150o_pins: gpio150o-pins {
+ pins = "GPIO150/MMC_DT6";
+ bias-disable;
+ output-high;
+ };
+ gpio150ol_pins: gpio150ol-pins {
+ pins = "GPIO150/MMC_DT6";
+ bias-disable;
+ output-low;
+ };
+ gpio151_pins: gpio151-pins {
+ pins = "GPIO151/MMC_DT7";
+ bias-disable;
+ input-enable;
+ };
+ gpio151o_pins: gpio151o-pins {
+ pins = "GPIO151/MMC_DT7";
+ bias-disable;
+ output-high;
+ };
+ gpio151ol_pins: gpio151ol-pins {
+ pins = "GPIO151/MMC_DT7";
+ bias-disable;
+ output-low;
+ };
+ gpio152_pins: gpio152-pins {
+ pins = "GPIO152/MMC_CLK";
+ bias-disable;
+ input-enable;
+ };
+ gpio152o_pins: gpio152o-pins {
+ pins = "GPIO152/MMC_CLK";
+ bias-disable;
+ output-high;
+ };
+ gpio152ol_pins: gpio152ol-pins {
+ pins = "GPIO152/MMC_CLK";
+ bias-disable;
+ output-low;
+ };
+ gpio153_pins: gpio153-pins {
+ pins = "GPIO153/MMC_WP";
+ bias-disable;
+ input-enable;
+ };
+ gpio153ol_pins: gpio153ol-pins {
+ pins = "GPIO153/MMC_WP";
+ bias-disable;
+ output-low;
+ };
+ gpio154_pins: gpio154-pins {
+ pins = "GPIO154/MMC_CMD";
+ bias-disable;
+ input-enable;
+ };
+ gpio154ol_pins: gpio154ol-pins {
+ pins = "GPIO154/MMC_CMD";
+ bias-disable;
+ output-low;
+ };
+ gpio155_pins: gpio155-pins {
+ pins = "GPIO155/MMC_nCD/MMC_nRSTLK";
+ bias-disable;
+ input-enable;
+ };
+ gpio155ol_pins: gpio155ol-pins {
+ pins = "GPIO155/MMC_nCD/MMC_nRSTLK";
+ bias-disable;
+ output-low;
+ };
+ gpio156_pins: gpio156-pins {
+ pins = "GPIO156/MMC_DT0";
+ bias-disable;
+ input-enable;
+ };
+ gpio156ol_pins: gpio156ol-pins {
+ pins = "GPIO156/MMC_DT0";
+ bias-disable;
+ output-low;
+ };
+ gpio157_pins: gpio157-pins {
+ pins = "GPIO157/MMC_DT1";
+ bias-disable;
+ input-enable;
+ };
+ gpio157o_pins: gpio157o-pins {
+ pins = "GPIO157/MMC_DT1";
+ bias-disable;
+ output-high;
+ };
+ gpio157ol_pins: gpio157ol-pins {
+ pins = "GPIO157/MMC_DT1";
+ bias-disable;
+ output-low;
+ };
+ gpio158_pins: gpio158-pins {
+ pins = "GPIO158/MMC_DT2";
+ bias-disable;
+ input-enable;
+ };
+ gpio158o_pins: gpio158o-pins {
+ pins = "GPIO158/MMC_DT2";
+ bias-disable;
+ output-high;
+ };
+ gpio158ol_pins: gpio158ol-pins {
+ pins = "GPIO158/MMC_DT2";
+ bias-disable;
+ output-low;
+ };
+ gpio159_pins: gpio159-pins {
+ pins = "GPIO159/MMC_DT3";
+ bias-disable;
+ input-enable;
+ };
+ gpio159o_pins: gpio159o-pins {
+ pins = "GPIO159/MMC_DT3";
+ bias-disable;
+ output-high;
+ };
+ gpio159ol_pins: gpio159ol-pins {
+ pins = "GPIO159/MMC_DT3";
+ bias-disable;
+ output-low;
+ };
+ gpio160_pins: gpio160-pins {
+ pins = "GPIO160/CLKOUT/RNGOSCOUT/GFXBYPCK";
+ bias-disable;
+ input-enable;
+ };
+ gpio160o_pins: gpio160o-pins {
+ pins = "GPIO160/CLKOUT/RNGOSCOUT/GFXBYPCK";
+ bias-disable;
+ output-high;
+ };
+ gpio160ol_pins: gpio160ol-pins {
+ pins = "GPIO160/CLKOUT/RNGOSCOUT/GFXBYPCK";
+ bias-disable;
+ output-low;
+ };
+ gpio161_pins: gpio161-pins {
+ pins = "GPIO161/ESPI_nCS/LPC_nLFRAME";
+ bias-disable;
+ input-enable;
+ };
+ gpio162_pins: gpio162-pins {
+ pins = "GPIO162/LPC_nCLKRUN";
+ bias-disable;
+ input-enable;
+ };
+ gpio162o_pins: gpio162o-pins {
+ pins = "GPIO162/LPC_nCLKRUN";
+ bias-disable;
+ output-high;
+ };
+ gpio163_pins: gpio163-pins {
+ pins = "GPIO163/ESPI_CK/LPC_LCLK";
+ bias-disable;
+ input-enable;
+ };
+ gpio164_pins: gpio164-pins {
+ pins = "GPIO164/ESPI_IO0/LPC_LAD0";
+ bias-disable;
+ input-enable;
+ };
+ gpio165_pins: gpio165-pins {
+ pins = "GPIO165/ESPI_IO1/LPC_LAD1";
+ bias-disable;
+ input-enable;
+ };
+ gpio166_pins: gpio166-pins {
+ pins = "GPIO166/ESPI_IO2/LPC_LAD2";
+ bias-disable;
+ input-enable;
+ };
+ gpio167_pins: gpio167-pins {
+ pins = "GPIO167/ESPI_IO3/LPC_LAD3";
+ bias-disable;
+ input-enable;
+ };
+ gpio168_pins: gpio168-pins {
+ pins = "GPIO168/ESPI_nALERT/SERIRQ";
+ bias-disable;
+ input-enable;
+ drive-open-drain;
+ };
+ gpio168ol_pins: gpio168ol-pins {
+ pins = "GPIO168/ESPI_nALERT/SERIRQ";
+ bias-disable;
+ output-low;
+ };
+ gpio169_pins: gpio169-pins {
+ pins = "GPIO169/nSCIPME/SMB21_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio169o_pins: gpio169o-pins {
+ pins = "GPIO169/nSCIPME/SMB21_SCL";
+ bias-disable;
+ output-high;
+ };
+ gpio169ol_pins: gpio169ol-pins {
+ pins = "GPIO169/nSCIPME/SMB21_SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio170_pins: gpio170-pins {
+ pins = "GPIO170/nSMI/SMB21_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio170ol_pins: gpio170ol-pins {
+ pins = "GPIO170/nSMI/SMB21_SDA";
+ bias-disable;
+ output-low;
+ };
+ gpio173o_pins: gpio173o-pins {
+ pins = "GPIO173/SMB7_SCL";
+ bias-disable;
+ output-high;
+ };
+ gpio173ol_pins: gpio173ol-pins {
+ pins = "GPIO173/SMB7_SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio174_pins: gpio174-pins {
+ pins = "GPIO174/SMB7_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio175_pins: gpio175-pins {
+ pins = "GPIO175/SPI1_CK/FANIN19/FM1_CK";
+ bias-disable;
+ input-enable;
+ };
+ gpio175o_pins: gpio175o-pins {
+ pins = "GPIO175/SPI1_CK/FANIN19/FM1_CK";
+ bias-disable;
+ output-high;
+ };
+ gpio175ol_pins: gpio175ol-pins {
+ pins = "GPIO175/SPI1_CK/FANIN19/FM1_CK";
+ bias-disable;
+ output-low;
+ };
+ gpio176_pins: gpio176-pins {
+ pins = "GPIO176/SPI1_DO/FANIN18/FM1_DO/STRAP9";
+ bias-disable;
+ input-enable;
+ };
+ gpio176o_pins: gpio176o-pins {
+ pins = "GPIO176/SPI1_DO/FANIN18/FM1_DO/STRAP9";
+ bias-disable;
+ output-high;
+ };
+ gpio176ol_pins: gpio176ol-pins {
+ pins = "GPIO176/SPI1_DO/FANIN18/FM1_DO/STRAP9";
+ bias-disable;
+ output-low;
+ };
+ gpio177_pins: gpio177-pins {
+ pins = "GPIO177/SPI1_DI/FANIN17/FM1_D1/STRAP10";
+ bias-disable;
+ input-enable;
+ };
+ gpio177o_pins: gpio177o-pins {
+ pins = "GPIO177/SPI1_DI/FANIN17/FM1_D1/STRAP10";
+ bias-disable;
+ output-high;
+ };
+ gpio177ol_pins: gpio177ol-pins {
+ pins = "GPIO177/SPI1_DI/FANIN17/FM1_D1/STRAP10";
+ bias-disable;
+ output-low;
+ };
+ gpio187_pins: gpio187-pins {
+ pins = "GPIO187/SPI3_nCS1_SMB14_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio187o_pins: gpio187o-pins {
+ pins = "GPIO187/SPI3_nCS1_SMB14_SDA";
+ bias-disable;
+ output-high;
+ };
+ gpio187ol_pins: gpio187ol-pins {
+ pins = "GPIO187/SPI3_nCS1_SMB14_SDA";
+ bias-disable;
+ output-low;
+ };
+ gpio188_pins: gpio188-pins {
+ pins = "GPIO188/SPI3_D2/SPI3_nCS2";
+ bias-disable;
+ input-enable;
+ };
+ gpio188o_pins: gpio188o-pins {
+ pins = "GPIO188/SPI3_D2/SPI3_nCS2";
+ bias-disable;
+ output-high;
+ };
+ gpio189o_pins: gpio189o-pins {
+ pins = "GPIO189/SPI3_D3/SPI3_nCS3";
+ bias-disable;
+ output-high;
+ };
+ gpio190_pins: gpio190-pins {
+ pins = "GPIO190/nPRD_SMI";
+ bias-disable;
+ input-enable;
+ };
+ gpio190o_pins: gpio190o-pins {
+ pins = "GPIO190/nPRD_SMI";
+ bias-disable;
+ output-high;
+ };
+ gpio190ol_pins: gpio190ol-pins {
+ pins = "GPIO190/nPRD_SMI";
+ bias-disable;
+ output-low;
+ };
+ gpio191o_pins: gpio191o-pins {
+ pins = "GPIO191/SPI1_D1/FANIN17/FM1_D1/STRAP10";
+ bias-disable;
+ output-high;
+ };
+ gpio191ol_pins: gpio191ol-pins {
+ pins = "GPIO191/SPI1_D1/FANIN17/FM1_D1/STRAP10";
+ bias-disable;
+ output-low;
+ };
+ gpio192_pins: gpio192-pins {
+ pins = "GPIO192/SPI1_D3/SPI_nCS3/FM1_D3/SMB15_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio192o_pins: gpio192o-pins {
+ pins = "GPIO192/SPI1_D3/SPI_nCS3/FM1_D3/SMB15_SCL";
+ bias-disable;
+ output-high;
+ };
+ gpio192ol_pins: gpio192ol-pins {
+ pins = "GPIO192/SPI1_D3/SPI_nCS3/FM1_D3/SMB15_SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio194_pins: gpio194-pins {
+ pins = "GPIO194/SMB0B_SCL/FM0_CK";
+ bias-disable;
+ input-enable;
+ };
+ gpio194o_pins: gpio194o-pins {
+ pins = "GPIO194/SMB0B_SCL/FM0_CK";
+ bias-disable;
+ output-high;
+ };
+ gpio195_pins: gpio195-pins {
+ pins = "GPIO195/SMB0B_SDA/FM0_D0";
+ bias-disable;
+ input-enable;
+ };
+ gpio196_pins: gpio196-pins {
+ pins = "GPIO196/SMB0C_SCL/FM0_D1";
+ bias-disable;
+ input-enable;
+ };
+ gpio196o_pins: gpio196o-pins {
+ pins = "GPIO196/SMB0C_SCL/FM0_D1";
+ bias-disable;
+ output-high;
+ };
+ gpio197_pins: gpio197-pins {
+ pins = "GPIO197/SMB0DEN/FM0_D3";
+ bias-disable;
+ input-enable;
+ };
+ gpio197o_pins: gpio197o-pins {
+ pins = "GPIO197/SMB0DEN/FM0_D3";
+ bias-disable;
+ output-high;
+ };
+ gpio197ol_pins: gpio197ol-pins {
+ pins = "GPIO197/SMB0DEN/FM0_D3";
+ bias-disable;
+ output-low;
+ };
+ gpio198o_pins: gpio198o-pins {
+ pins = "GPIO198/SMB0D_SDA/FM0_D2";
+ bias-disable;
+ output-high;
+ };
+ gpio198ol_pins: gpio198ol-pins {
+ pins = "GPIO198/SMB0D_SDA/FM0_D2";
+ bias-disable;
+ output-low;
+ };
+ gpio199_pins: gpio199-pins {
+ pins = "GPIO199/SMB0D_SCL/FM0_CSO";
+ bias-disable;
+ input-enable;
+ };
+ gpio200_pins: gpio200-pins {
+ pins = "GPIO200/R2_CK";
+ input-enable;
+ bias-disable;
+ };
+ gpio200ol_pins: gpio200ol-pins {
+ pins = "GPIO200/R2_CK";
+ bias-disable;
+ output-low;
+ };
+ gpio201ol_pins: gpio201ol-pins {
+ pins = "GPIO201/R1_CK";
+ bias-disable;
+ output-low;
+ };
+ gpio202_pins: gpio202-pins {
+ pins = "GPIO202/SMB0C_SDA/FM0_CSI";
+ bias-disable;
+ input-enable;
+ };
+ gpio203_pins: gpio203-pins {
+ pins = "GPIO203/SPI1_nCS0/FANIN16/FM1_CSI";
+ bias-disable;
+ input-enable;
+ };
+ gpio203o_pins: gpio203o-pins {
+ pins = "GPIO203/SPI1_nCS0/FANIN16/FM1_CSI";
+ bias-disable;
+ output-high;
+ };
+ gpio203ol_pins: gpio203ol-pins {
+ pins = "GPIO203/SPI1_nCS0/FANIN16/FM1_CSI";
+ bias-disable;
+ output-low;
+ };
+ gpio208_pins: gpio208-pins {
+ pins = "GPIO208/RG2_TXC/DVCK";
+ bias-disable;
+ input-enable;
+ };
+ gpio208o_pins: gpio208o-pins {
+ pins = "GPIO208/RG2_TXC/DVCK";
+ bias-disable;
+ output-high;
+ };
+ gpio208ol_pins: gpio208ol-pins {
+ pins = "GPIO208/RG2_TXC/DVCK";
+ bias-disable;
+ output-low;
+ };
+ gpio209_pins: gpio209-pins {
+ pins = "GPIO209/RG2_TXCTL/DDRV4/R3_TXEN";
+ bias-disable;
+ input-enable;
+ };
+ gpio209ol_pins: gpio209ol-pins {
+ pins = "GPIO209/RG2_TXCTL/DDRV4/R3_TXEN";
+ bias-disable;
+ output-low;
+ };
+ gpio210_pins: gpio210-pins {
+ pins = "GPIO210/RG2_RXD0/DDRV5/R3_RXD0";
+ bias-disable;
+ input-enable;
+ };
+ gpio210o_pins: gpio210o-pins {
+ pins = "GPIO210/RG2_RXD0/DDRV5/R3_RXD0";
+ bias-disable;
+ output-high;
+ };
+ gpio210ol_pins: gpio210ol-pins {
+ pins = "GPIO210/RG2_RXD0/DDRV5/R3_RXD0";
+ bias-disable;
+ output-low;
+ };
+ gpio211_pins: gpio211-pins {
+ pins = "GPIO211/RG2_RXD1/DDRV6/R3_RXD1";
+ bias-disable;
+ input-enable;
+ };
+ gpio211o_pins: gpio211o-pins {
+ pins = "GPIO211/RG2_RXD1/DDRV6/R3_RXD1";
+ bias-disable;
+ output-high;
+ };
+ gpio211ol_pins: gpio211ol-pins {
+ pins = "GPIO211/RG2_RXD1/DDRV6/R3_RXD1";
+ bias-disable;
+ output-low;
+ };
+ gpio212_pins: gpio212-pins {
+ pins = "GPIO212/RG2_RXD2/DDRV7/R3_RXD2";
+ bias-disable;
+ input-enable;
+ };
+ gpio212o_pins: gpio212o-pins {
+ pins = "GPIO212/RG2_RXD2/DDRV7/R3_RXD2";
+ bias-disable;
+ output-high;
+ };
+ gpio212ol_pins: gpio212ol-pins {
+ pins = "GPIO212/RG2_RXD2/DDRV7/R3_RXD2";
+ bias-disable;
+ output-low;
+ };
+ gpio213_pins: gpio213-pins {
+ pins = "GPIO213/RG2_RXD3/DDRV8/R3_OEN";
+ bias-disable;
+ input-enable;
+ };
+ gpio213o_pins: gpio213o-pins {
+ pins = "GPIO213/RG2_RXD3/DDRV8/R3_OEN";
+ bias-disable;
+ output-high;
+ };
+ gpio213ol_pins: gpio213ol-pins {
+ pins = "GPIO213/RG2_RXD3/DDRV8/R3_OEN";
+ bias-disable;
+ output-low;
+ };
+ gpio214_pins: gpio214-pins {
+ pins = "GPIO214/RG2_RXC/DDRV9/R3_CK";
+ bias-disable;
+ input-enable;
+ };
+ gpio214ol_pins: gpio214ol-pins {
+ pins = "GPIO214/RG2_RXC/DDRV9/R3_CK";
+ bias-disable;
+ output-low;
+ };
+ gpio215_pins: gpio215-pins {
+ pins = "GPIO215/RG2_RXCTL/DDRV10/R3_CRSDV";
+ bias-disable;
+ input-enable;
+ };
+ gpio215ol_pins: gpio215ol-pins {
+ pins = "GPIO215/RG2_RXCTL/DDRV10/R3_CRSDV";
+ bias-disable;
+ output-low;
+ };
+ gpio216_pins: gpio216-pins {
+ pins = "GPIO216/RG2_MDC/DDRV11";
+ bias-disable;
+ input-enable;
+ };
+ gpio216ol_pins: gpio216ol-pins {
+ pins = "GPIO216/RG2_MDC/DDRV11";
+ bias-disable;
+ output-low;
+ };
+ gpio217_pins: gpio217-pins {
+ pins = "GPIO217/RG2_MDIO/DVHSYNC";
+ bias-disable;
+ input-enable;
+ };
+ gpio217ol_pins: gpio217ol-pins {
+ pins = "GPIO217/RG2_MDIO/DVHSYNC";
+ bias-disable;
+ output-low;
+ };
+ gpio218_pins: gpio218-pins {
+ pins = "GPIO218/nWDO1/SMB16_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio218ol_pins: gpio218ol-pins {
+ pins = "GPIO218/nWDO1/SMB16_SCL";
+ bias-disable;
+ output-low;
+ };
+ gpio219_pins: gpio219-pins {
+ pins = "GPIO219/nWDO2/SMB16_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio219ol_pins: gpio219ol-pins {
+ pins = "GPIO219/nWDO2/SMB16_SDA";
+ bias-disable;
+ output-low;
+ };
+ gpio220ol_pins: gpio220ol-pins {
+ pins = "GPIO220/SMB12_SCL/PWM8";
+ bias-disable;
+ output-low;
+ };
+ gpio221o_pins: gpio221o-pins {
+ pins = "GPIO221/SMB12_SDA/PWM9";
+ bias-disable;
+ output-high;
+ };
+ gpio222_pins: gpio222-pins {
+ pins = "GPIO222/SMB13_SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio222o_pins: gpio222o-pins {
+ pins = "GPIO222/SMB13_SCL";
+ bias-disable;
+ output-high;
+ };
+ gpio223_pins: gpio223-pins {
+ pins = "GPIO223/SMB13_SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio223ol_pins: gpio223ol-pins {
+ pins = "GPIO223/SMB13_SDA";
+ bias-disable;
+ output-low;
+ };
+ gpio224_pins: gpio224-pins {
+ pins = "GPIO224/SPIX_CK/FM2_CK";
+ bias-disable;
+ input-enable;
+ };
+ gpio224o_pins: gpio224o-pins {
+ pins = "GPIO224/SPIX_CK/FM2_CK";
+ bias-disable;
+ output-high;
+ };
+ gpio224ol_pins: gpio224ol-pins {
+ pins = "GPIO224/SPIX_CK/FM2_CK";
+ bias-disable;
+ output-low;
+ };
+ gpio225_pins: gpio225-pins {
+ pins = "GPO225/SPIX_D0/FM2_D0/STRAP1";
+ bias-disable;
+ input-enable;
+ };
+ gpio225o_pins: gpio225o-pins {
+ pins = "GPO225/SPIX_D0/FM2_D0/STRAP1";
+ bias-disable;
+ output-high;
+ };
+ gpio226_pins: gpio226-pins {
+ pins = "GPO226/SPIX_D1/FM2_D1/STRAP2";
+ bias-disable;
+ input-enable;
+ };
+ gpio226o_pins: gpio226o-pins {
+ pins = "GPO226/SPIX_D1/FM2_D1/STRAP2";
+ bias-disable;
+ output-high;
+ };
+ gpio227_pins: gpio227-pins {
+ pins = "GPIO227/SPIX_nCS0/FM2_CSI";
+ bias-disable;
+ input-enable;
+ };
+ gpio227o_pins: gpio227o-pins {
+ pins = "GPIO227/SPIX_nCS0/FM2_CSI";
+ bias-disable;
+ output-high;
+ };
+ gpio227ol_pins: gpio227ol-pins {
+ pins = "GPIO227/SPIX_nCS0/FM2_CSI";
+ bias-disable;
+ output-low;
+ };
+ gpio228_pins: gpio228-pins {
+ pins = "GPIO228/SPIX_nCS1/FM2_CSO";
+ bias-disable;
+ input-enable;
+ };
+ gpio228ol_pins: gpio228ol-pins {
+ pins = "GPIO228/SPIX_nCS1/FM2_CSO";
+ bias-disable;
+ output-low;
+ };
+ gpio229_pins: gpio229-pins {
+ pins = "GPO229/SPIX_D2/FM2_D2/STRAP3";
+ bias-disable;
+ input-enable;
+ };
+ gpio229o_pins: gpio229o-pins {
+ pins = "GPO229/SPIX_D2/FM2_D2/STRAP3";
+ bias-disable;
+ output-high;
+ };
+ gpio230_pins: gpio230-pins {
+ pins = "GPO230/SPIX_D3/FM2_D3/STRAP6";
+ bias-disable;
+ input-enable;
+ };
+ gpio230o_pins: gpio230o-pins {
+ pins = "GPO230/SPIX_D3/FM2_D3/STRAP6";
+ bias-disable;
+ output-high;
+ };
+ gpio230ol_pins: gpio230ol-pins {
+ pins = "GPO230/SPIX_D3/FM2_D3/STRAP6";
+ bias-disable;
+ output-low;
+ };
+ gpio231_pins: gpio231-pins {
+ pins = "GPIO231/EP_nCLKREQ";
+ bias-disable;
+ input-enable;
+ };
+ gpio231o_pins: gpio231o-pins {
+ pins = "GPIO231/EP_nCLKREQ";
+ bias-disable;
+ output-high;
+ };
+ };
+};
diff --git a/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi b/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi
index f5f1ce669b..d21e5042a6 100644
--- a/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi
+++ b/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi
@@ -59,6 +59,174 @@
clocks = <&clk_refclk>;
};
+ ehci1: usb@f0828100 {
+ compatible = "nuvoton,npcm845-ehci";
+ reg = <0x0 0xf0828100 0x0 0x1000>;
+ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rstc2 NPCM8XX_RESET_USBH1>;
+ status = "disabled";
+ };
+
+ ehci2: usb@f082a100 {
+ compatible = "nuvoton,npcm845-ehci";
+ reg = <0x0 0xf082a100 0x0 0x1000>;
+ interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rstc4 NPCM8XX_RESET_USBH2>;
+ status = "disabled";
+ };
+
+ ohci1: usb@f0829000 {
+ compatible = "nuvoton,npcm845-ohci";
+ reg = <0x0 0xF0829000 0x0 0x1000>;
+ resets = <&rstc2 NPCM8XX_RESET_USBH1>;
+ status = "disabled";
+ };
+
+ ohci2: usb@f082b000 {
+ compatible = "nuvoton,npcm845-ohci";
+ reg = <0x0 0xF082B000 0x0 0x1000>;
+ resets = <&rstc4 NPCM8XX_RESET_USBH2>;
+ status = "disabled";
+ };
+
+ usbphy {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ syscon = <&gcr>;
+ usbphy1: usbphy@1 {
+ compatible = "nuvoton,npcm845-usb-phy";
+ #phy-cells = <1>;
+ reg = <1>;
+ resets = <&rstc3 NPCM8XX_RESET_USBPHY1>;
+ status = "disabled";
+ };
+ usbphy2: usbphy@2 {
+ compatible = "nuvoton,npcm845-usb-phy";
+ #phy-cells = <1>;
+ reg = <2>;
+ resets = <&rstc3 NPCM8XX_RESET_USBPHY2>;
+ status = "disabled";
+ };
+ usbphy3: usbphy@3 {
+ compatible = "nuvoton,npcm845-usb-phy";
+ #phy-cells = <1>;
+ reg = <3>;
+ resets = <&rstc3 NPCM8XX_RESET_USBPHY3>;
+ status = "disabled";
+ };
+ };
+
+ udc0:udc@f0830100 {
+ compatible = "nuvoton,npcm845-udc";
+ reg = <0x0 0xf0830100 0x0 0x100
+ 0x0 0xfffb0000 0x0 0x800>;
+ interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM8XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ resets = <&rstc3 NPCM8XX_RESET_UDC0>;
+ status = "disable";
+ };
+
+ udc1:udc@f0831100 {
+ compatible = "nuvoton,npcm845-udc";
+ reg = <0x0 0xf0831100 0x0 0x100
+ 0x0 0xfffb0800 0x0 0x800>;
+ interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM8XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ resets = <&rstc1 NPCM8XX_RESET_UDC1>;
+ status = "disable";
+ };
+
+ udc2:udc@f0832100 {
+ compatible = "nuvoton,npcm845-udc";
+ reg = <0x0 0xf0832100 0x0 0x100
+ 0x0 0xfffb1000 0x0 0x800>;
+ interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM8XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ resets = <&rstc1 NPCM8XX_RESET_UDC2>;
+ status = "disable";
+ };
+
+ udc3:udc@f0833100 {
+ compatible = "nuvoton,npcm845-udc";
+ reg = <0x0 0xf0833100 0x0 0x100
+ 0x0 0xfffb1800 0x0 0x800>;
+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM8XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ resets = <&rstc1 NPCM8XX_RESET_UDC3>;
+ status = "disable";
+ };
+
+ udc4:udc@f0834100 {
+ compatible = "nuvoton,npcm845-udc";
+ reg = <0x0 0xf0834100 0x0 0x100
+ 0x0 0xfffb2000 0x0 0x800>;
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM8XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ resets = <&rstc1 NPCM8XX_RESET_UDC4>;
+ status = "disable";
+ };
+
+ udc5:udc@f0835100 {
+ compatible = "nuvoton,npcm845-udc";
+ reg = <0x0 0xf0835100 0x0 0x100
+ 0x0 0xfffb2800 0x0 0x800>;
+ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM8XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ resets = <&rstc1 NPCM8XX_RESET_UDC5>;
+ status = "disable";
+ };
+
+ udc6:udc@f0836100 {
+ compatible = "nuvoton,npcm845-udc";
+ reg = <0x0 0xf0836100 0x0 0x100
+ 0x0 0xfffb3000 0x0 0x800>;
+ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM8XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ resets = <&rstc1 NPCM8XX_RESET_UDC6>;
+ status = "disable";
+ };
+
+ udc7:udc@f0837100 {
+ compatible = "nuvoton,npcm845-udc";
+ reg = <0x0 0xf0837100 0x0 0x100
+ 0x0 0xfffb3800 0x0 0x800>;
+ interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM8XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ resets = <&rstc3 NPCM8XX_RESET_UDC7>;
+ status = "disable";
+ };
+
+ udc8:udc@f0838100 {
+ compatible = "nuvoton,npcm845-udc";
+ reg = <0x0 0xf0838100 0x0 0x100
+ 0x0 0xfffb4000 0x0 0x800>;
+ interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM8XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ resets = <&rstc3 NPCM8XX_RESET_UDC8>;
+ status = "disable";
+ };
+
+ udc9:udc@f0839100 {
+ compatible = "nuvoton,npcm845-udc";
+ reg = <0x0 0xf0839100 0x0 0x100
+ 0x0 0xfffb4800 0x0 0x800>;
+ interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM8XX_CLK_SU>;
+ clock-names = "clk_usb_bridge";
+ resets = <&rstc3 NPCM8XX_RESET_UDC9>;
+ status = "disable";
+ };
+
apb {
serial0: serial@0 {
compatible = "nuvoton,npcm845-uart";
@@ -69,7 +237,7 @@
};
gpio0: gpio0@10000 {
- compatible = "nuvoton,npcm-gpio";
+ compatible = "nuvoton,npcm-gpio", "nuvoton,npcm845-gpio";
reg = <0x10000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@@ -77,7 +245,7 @@
};
gpio1: gpio1@11000 {
- compatible = "nuvoton,npcm-gpio";
+ compatible = "nuvoton,npcm-gpio", "nuvoton,npcm845-gpio";
reg = <0x11000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@@ -85,7 +253,7 @@
};
gpio2: gpio2@12000 {
- compatible = "nuvoton,npcm-gpio";
+ compatible = "nuvoton,npcm-gpio", "nuvoton,npcm845-gpio";
reg = <0x12000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@@ -93,7 +261,7 @@
};
gpio3: gpio3@13000 {
- compatible = "nuvoton,npcm-gpio";
+ compatible = "nuvoton,npcm-gpio", "nuvoton,npcm845-gpio";
reg = <0x13000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@@ -101,7 +269,7 @@
};
gpio4: gpio4@14000 {
- compatible = "nuvoton,npcm-gpio";
+ compatible = "nuvoton,npcm-gpio", "nuvoton,npcm845-gpio";
reg = <0x14000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@@ -109,7 +277,7 @@
};
gpio5: gpio5@15000 {
- compatible = "nuvoton,npcm-gpio";
+ compatible = "nuvoton,npcm-gpio", "nuvoton,npcm845-gpio";
reg = <0x15000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@@ -117,7 +285,7 @@
};
gpio6: gpio6@16000 {
- compatible = "nuvoton,npcm-gpio";
+ compatible = "nuvoton,npcm-gpio", "nuvoton,npcm845-gpio";
reg = <0x16000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@@ -125,7 +293,7 @@
};
gpio7: gpio7@17000 {
- compatible = "nuvoton,npcm-gpio";
+ compatible = "nuvoton,npcm-gpio", "nuvoton,npcm845-gpio";
reg = <0x17000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@@ -133,4 +301,652 @@
};
};
};
+ pinctrl: pinctrl@f0800000 {
+ compatible = "nuvoton,npcm845-pinctrl", "syscon", "simple-mfd";
+ reg = <0x0 0xf0010000 0x0 0x8000>;
+ syscon-gcr = <&gcr>;
+ syscon-rst = <&rstc>;
+ status = "okay";
+
+ iox1_pins: iox1-pins {
+ groups = "iox1";
+ function = "iox1";
+ };
+ iox2_pins: iox2-pins {
+ groups = "iox2";
+ function = "iox2";
+ };
+ smb1d_pins: smb1d-pins {
+ groups = "smb1d";
+ function = "smb1d";
+ };
+ smb2d_pins: smb2d-pins {
+ groups = "smb2d";
+ function = "smb2d";
+ };
+ lkgpo1_pins: lkgpo1-pins {
+ groups = "lkgpo1";
+ function = "lkgpo1";
+ };
+ lkgpo2_pins: lkgpo2-pins {
+ groups = "lkgpo2";
+ function = "lkgpo2";
+ };
+ ioxh_pins: ioxh-pins {
+ groups = "ioxh";
+ function = "ioxh";
+ };
+ gspi_pins: gspi-pins {
+ groups = "gspi";
+ function = "gspi";
+ };
+ smb5b_pins: smb5b-pins {
+ groups = "smb5b";
+ function = "smb5b";
+ };
+ smb5c_pins: smb5c-pins {
+ groups = "smb5c";
+ function = "smb5c";
+ };
+ lkgpo0_pins: lkgpo0-pins {
+ groups = "lkgpo0";
+ function = "lkgpo0";
+ };
+ pspi_pins: pspi-pins {
+ groups = "pspi";
+ function = "pspi";
+ };
+ vgadig_pins: vgadig-pins {
+ groups = "vgadig";
+ function = "vgadig";
+ };
+ jm1_pins: jm1-pins {
+ groups = "jm1";
+ function = "jm1";
+ };
+ jm2_pins: jm2-pins {
+ groups = "jm2";
+ function = "jm2";
+ };
+ smb4b_pins: smb4b-pins {
+ groups = "smb4b";
+ function = "smb4b";
+ };
+ smb4c_pins: smb4c-pins {
+ groups = "smb4c";
+ function = "smb4c";
+ };
+ smb15_pins: smb15-pins {
+ groups = "smb15";
+ function = "smb15";
+ };
+ smb16_pins: smb16-pins {
+ groups = "smb16";
+ function = "smb16";
+ };
+ smb17_pins: smb17-pins {
+ groups = "smb17";
+ function = "smb17";
+ };
+ smb18_pins: smb18-pins {
+ groups = "smb18";
+ function = "smb18";
+ };
+ smb19_pins: smb19-pins {
+ groups = "smb19";
+ function = "smb19";
+ };
+ smb20_pins: smb20-pins {
+ groups = "smb20";
+ function = "smb20";
+ };
+ smb21_pins: smb21-pins {
+ groups = "smb21";
+ function = "smb21";
+ };
+ smb22_pins: smb22-pins {
+ groups = "smb22";
+ function = "smb22";
+ };
+ smb23_pins: smb23-pins {
+ groups = "smb23";
+ function = "smb23";
+ };
+ smb4d_pins: smb4d-pins {
+ groups = "smb4d";
+ function = "smb4d";
+ };
+ smb14_pins: smb14-pins {
+ groups = "smb14";
+ function = "smb14";
+ };
+ smb5_pins: smb5-pins {
+ groups = "smb5";
+ function = "smb5";
+ };
+ smb4_pins: smb4-pins {
+ groups = "smb4";
+ function = "smb4";
+ };
+ smb3_pins: smb3-pins {
+ groups = "smb3";
+ function = "smb3";
+ };
+ spi0cs1_pins: spi0cs1-pins {
+ groups = "spi0cs1";
+ function = "spi0cs1";
+ };
+ spi0cs2_pins: spi0cs2-pins {
+ groups = "spi0cs2";
+ function = "spi0cs2";
+ };
+ spi0cs3_pins: spi0cs3-pins {
+ groups = "spi0cs3";
+ function = "spi0cs3";
+ };
+ smb3c_pins: smb3c-pins {
+ groups = "smb3c";
+ function = "smb3c";
+ };
+ smb3b_pins: smb3b-pins {
+ groups = "smb3b";
+ function = "smb3b";
+ };
+ hsi1a_pins: hsi1a-pins {
+ groups = "hsi1a";
+ function = "hsi1a";
+ };
+ hsi1b_pins: hsi1b-pins {
+ groups = "hsi1b";
+ function = "hsi1b";
+ };
+ hsi1c_pins: hsi1c-pins {
+ groups = "hsi1c";
+ function = "hsi1c";
+ };
+ hsi2a_pins: hsi2a-pins {
+ groups = "hsi2a";
+ function = "hsi2a";
+ };
+ hsi2b_pins: hsi2b-pins {
+ groups = "hsi2b";
+ function = "hsi2b";
+ };
+ hsi2c_pins: hsi2c-pins {
+ groups = "hsi2c";
+ function = "hsi2c";
+ };
+ bmcuart0a_pins: bmcuart0a-pins {
+ groups = "bmcuart0a";
+ function = "bmcuart0a";
+ };
+ bmcuart0b_pins: bmcuart0b-pins {
+ groups = "bmcuart0b";
+ function = "bmcuart0b";
+ };
+ bmcuart1_pins: bmcuart1-pins {
+ groups = "bmcuart1";
+ function = "bmcuart1";
+ };
+ bu4_pins: bu4-pins {
+ groups = "bu4";
+ function = "bu4";
+ };
+ bu5_pins: bu5-pins {
+ groups = "bu5";
+ function = "bu5";
+ };
+ bu6_pins: bu6-pins {
+ groups = "bu6";
+ function = "bu6";
+ };
+ r1err_pins: r1err-pins {
+ groups = "r1err";
+ function = "r1err";
+ };
+ r1md_pins: r1md-pins {
+ groups = "r1md";
+ function = "r1md";
+ };
+ r1oen_pins: r1oen-pins {
+ groups = "r1oen";
+ function = "r1oen";
+ };
+ r1en_pins: r1en-pins {
+ groups = "r1en";
+ function = "r1en";
+ };
+ r2oen_pins: r2oen-pins {
+ groups = "r2oen";
+ function = "r2oen";
+ };
+ r2en_pins: r2en-pins {
+ groups = "r2en";
+ function = "r2en";
+ };
+ rmii3_pins: rmii3_pins {
+ groups = "rmii3";
+ function = "rmii3";
+ };
+ r3oen_pins: r3oen-pins {
+ groups = "r3oen";
+ function = "r3oen";
+ };
+ r3en_pins: r3en-pins {
+ groups = "r3en";
+ function = "r3en";
+ };
+ smb3d_pins: smb3d-pins {
+ groups = "smb3d";
+ function = "smb3d";
+ };
+ fanin0_pins: fanin0-pins {
+ groups = "fanin0";
+ function = "fanin0";
+ };
+ fanin1_pins: fanin1-pins {
+ groups = "fanin1";
+ function = "fanin1";
+ };
+ fanin2_pins: fanin2-pins {
+ groups = "fanin2";
+ function = "fanin2";
+ };
+ fanin3_pins: fanin3-pins {
+ groups = "fanin3";
+ function = "fanin3";
+ };
+ fanin4_pins: fanin4-pins {
+ groups = "fanin4";
+ function = "fanin4";
+ };
+ fanin5_pins: fanin5-pins {
+ groups = "fanin5";
+ function = "fanin5";
+ };
+ fanin6_pins: fanin6-pins {
+ groups = "fanin6";
+ function = "fanin6";
+ };
+ fanin7_pins: fanin7-pins {
+ groups = "fanin7";
+ function = "fanin7";
+ };
+ fanin8_pins: fanin8-pins {
+ groups = "fanin8";
+ function = "fanin8";
+ };
+ fanin9_pins: fanin9-pins {
+ groups = "fanin9";
+ function = "fanin9";
+ };
+ fanin10_pins: fanin10-pins {
+ groups = "fanin10";
+ function = "fanin10";
+ };
+ fanin11_pins: fanin11-pins {
+ groups = "fanin11";
+ function = "fanin11";
+ };
+ fanin12_pins: fanin12-pins {
+ groups = "fanin12";
+ function = "fanin12";
+ };
+ fanin13_pins: fanin13-pins {
+ groups = "fanin13";
+ function = "fanin13";
+ };
+ fanin14_pins: fanin14-pins {
+ groups = "fanin14";
+ function = "fanin14";
+ };
+ fanin15_pins: fanin15-pins {
+ groups = "fanin15";
+ function = "fanin15";
+ };
+ pwm0_pins: pwm0-pins {
+ groups = "pwm0";
+ function = "pwm0";
+ };
+ pwm1_pins: pwm1-pins {
+ groups = "pwm1";
+ function = "pwm1";
+ };
+ pwm2_pins: pwm2-pins {
+ groups = "pwm2";
+ function = "pwm2";
+ };
+ pwm3_pins: pwm3-pins {
+ groups = "pwm3";
+ function = "pwm3";
+ };
+ r2_pins: r2-pins {
+ groups = "r2";
+ function = "r2";
+ };
+ r2err_pins: r2err-pins {
+ groups = "r2err";
+ function = "r2err";
+ };
+ r2md_pins: r2md-pins {
+ groups = "r2md";
+ function = "r2md";
+ };
+ r3rxer_pins: r3rxer_pins {
+ groups = "r3rxer";
+ function = "r3rxer";
+ };
+ ga20kbc_pins: ga20kbc-pins {
+ groups = "ga20kbc";
+ function = "ga20kbc";
+ };
+ smb5d_pins: smb5d-pins {
+ groups = "smb5d";
+ function = "smb5d";
+ };
+ lpc_pins: lpc-pins {
+ groups = "lpc";
+ function = "lpc";
+ };
+ espi_pins: espi-pins {
+ groups = "espi";
+ function = "espi";
+ };
+ rg1_pins: rg1-pins {
+ groups = "rg1";
+ function = "rg1";
+ };
+ rg1mdio_pins: rg1mdio-pins {
+ groups = "rg1mdio";
+ function = "rg1mdio";
+ };
+ rg2_pins: rg2-pins {
+ groups = "rg2";
+ function = "rg2";
+ };
+ ddr_pins: ddr-pins {
+ groups = "ddr";
+ function = "ddr";
+ };
+ i3c0_pins: i3c0-pins {
+ groups = "i3c0";
+ function = "i3c0";
+ };
+ i3c1_pins: i3c1-pins {
+ groups = "i3c1";
+ function = "i3c1";
+ };
+ i3c2_pins: i3c2-pins {
+ groups = "i3c2";
+ function = "i3c2";
+ };
+ i3c3_pins: i3c3-pins {
+ groups = "i3c3";
+ function = "i3c3";
+ };
+ i3c4_pins: i3c4-pins {
+ groups = "i3c4";
+ function = "i3c4";
+ };
+ i3c5_pins: i3c5-pins {
+ groups = "i3c5";
+ function = "i3c5";
+ };
+ smb0_pins: smb0-pins {
+ groups = "smb0";
+ function = "smb0";
+ };
+ smb1_pins: smb1-pins {
+ groups = "smb1";
+ function = "smb1";
+ };
+ smb2_pins: smb2-pins {
+ groups = "smb2";
+ function = "smb2";
+ };
+ smb2c_pins: smb2c-pins {
+ groups = "smb2c";
+ function = "smb2c";
+ };
+ smb2b_pins: smb2b-pins {
+ groups = "smb2b";
+ function = "smb2b";
+ };
+ smb1c_pins: smb1c-pins {
+ groups = "smb1c";
+ function = "smb1c";
+ };
+ smb1b_pins: smb1b-pins {
+ groups = "smb1b";
+ function = "smb1b";
+ };
+ smb8_pins: smb8-pins {
+ groups = "smb8";
+ function = "smb8";
+ };
+ smb9_pins: smb9-pins {
+ groups = "smb9";
+ function = "smb9";
+ };
+ smb10_pins: smb10-pins {
+ groups = "smb10";
+ function = "smb10";
+ };
+ smb11_pins: smb11-pins {
+ groups = "smb11";
+ function = "smb11";
+ };
+ sd1_pins: sd1-pins {
+ groups = "sd1";
+ function = "sd1";
+ };
+ sd1pwr_pins: sd1pwr-pins {
+ groups = "sd1pwr";
+ function = "sd1pwr";
+ };
+ pwm4_pins: pwm4-pins {
+ groups = "pwm4";
+ function = "pwm4";
+ };
+ pwm5_pins: pwm5-pins {
+ groups = "pwm5";
+ function = "pwm5";
+ };
+ pwm6_pins: pwm6-pins {
+ groups = "pwm6";
+ function = "pwm6";
+ };
+ pwm7_pins: pwm7-pins {
+ groups = "pwm7";
+ function = "pwm7";
+ };
+ pwm8_pins: pwm8-pins {
+ groups = "pwm8";
+ function = "pwm8";
+ };
+ pwm9_pins: pwm9-pins {
+ groups = "pwm9";
+ function = "pwm9";
+ };
+ pwm10_pins: pwm10-pins {
+ groups = "pwm10";
+ function = "pwm10";
+ };
+ pwm11_pins: pwm11-pins {
+ groups = "pwm11";
+ function = "pwm11";
+ };
+ mmc8_pins: mmc8-pins {
+ groups = "mmc8";
+ function = "mmc8";
+ };
+ mmc_pins: mmc-pins {
+ groups = "mmc";
+ function = "mmc";
+ };
+ mmcwp_pins: mmcwp-pins {
+ groups = "mmcwp";
+ function = "mmcwp";
+ };
+ mmccd_pins: mmccd-pins {
+ groups = "mmccd";
+ function = "mmccd";
+ };
+ mmcrst_pins: mmcrst-pins {
+ groups = "mmcrst";
+ function = "mmcrst";
+ };
+ clkout_pins: clkout-pins {
+ groups = "clkout";
+ function = "clkout";
+ };
+ serirq_pins: serirq-pins {
+ groups = "serirq";
+ function = "serirq";
+ };
+ scipme_pins: scipme-pins {
+ groups = "scipme";
+ function = "scipme";
+ };
+ sci_pins: sci-pins {
+ groups = "sci";
+ function = "sci";
+ };
+ smb6_pins: smb6-pins {
+ groups = "smb6";
+ function = "smb6";
+ };
+ smb7_pins: smb7-pins {
+ groups = "smb7";
+ function = "smb7";
+ };
+ spi1_pins: spi1-pins {
+ groups = "spi1";
+ function = "spi1";
+ };
+ spi1d23_pins: spi1d23-pins {
+ groups = "spi1d23";
+ function = "spi1d23";
+ };
+ faninx_pins: faninx-pins {
+ groups = "faninx";
+ function = "faninx";
+ };
+ r1_pins: r1-pins {
+ groups = "r1";
+ function = "r1";
+ };
+ spi3_pins: spi3-pins {
+ groups = "spi3";
+ function = "spi3";
+ };
+ spi3cs1_pins: spi3cs1-pins {
+ groups = "spi3cs1";
+ function = "spi3cs1";
+ };
+ spi3quad_pins: spi3quad-pins {
+ groups = "spi3quad";
+ function = "spi3quad";
+ };
+ spi3cs2_pins: spi3cs2-pins {
+ groups = "spi3cs2";
+ function = "spi3cs2";
+ };
+ spi3cs3_pins: spi3cs3-pins {
+ groups = "spi3cs3";
+ function = "spi3cs3";
+ };
+ nprd_smi_pins: nprd-smi-pins {
+ groups = "nprd_smi";
+ function = "nprd_smi";
+ };
+ smb0b_pins: smb0b-pins {
+ groups = "smb0b";
+ function = "smb0b";
+ };
+ smb0c_pins: smb0c-pins {
+ groups = "smb0c";
+ function = "smb0c";
+ };
+ smb0den_pins: smb0den-pins {
+ groups = "smb0den";
+ function = "smb0den";
+ };
+ smb0d_pins: smb0d-pins {
+ groups = "smb0d";
+ function = "smb0d";
+ };
+ rg2mdio_pins: rg2mdio-pins {
+ groups = "rg2mdio";
+ function = "rg2mdio";
+ };
+ rg2refck_pins: rg2refck-pins {
+ groups = "rg2refck";
+ function = "rg2refck";
+ };
+ wdog1_pins: wdog1-pins {
+ groups = "wdog1";
+ function = "wdog1";
+ };
+ wdog2_pins: wdog2-pins {
+ groups = "wdog2";
+ function = "wdog2";
+ };
+ smb12_pins: smb12-pins {
+ groups = "smb12";
+ function = "smb12";
+ };
+ smb13_pins: smb13-pins {
+ groups = "smb13";
+ function = "smb13";
+ };
+ spix_pins: spix-pins {
+ groups = "spix";
+ function = "spix";
+ };
+ spixcs1_pins: spixcs1-pins {
+ groups = "spixcs1";
+ function = "spixcs1";
+ };
+ clkreq_pins: clkreq-pins {
+ groups = "clkreq";
+ function = "clkreq";
+ };
+ hgpio0_pins: hgpio0-pins {
+ groups = "hgpio0";
+ function = "hgpio0";
+ };
+ hgpio1_pins: hgpio1-pins {
+ groups = "hgpio1";
+ function = "hgpio1";
+ };
+ hgpio2_pins: hgpio2-pins {
+ groups = "hgpio2";
+ function = "hgpio2";
+ };
+ hgpio3_pins: hgpio3-pins {
+ groups = "hgpio3";
+ function = "hgpio3";
+ };
+ hgpio4_pins: hgpio4-pins {
+ groups = "hgpio4";
+ function = "hgpio4";
+ };
+ hgpio5_pins: hgpio5-pins {
+ groups = "hgpio5";
+ function = "hgpio5";
+ };
+ hgpio6_pins: hgpio6-pins {
+ groups = "hgpio6";
+ function = "hgpio6";
+ };
+ hgpio7_pins: hgpio7-pins {
+ groups = "hgpio7";
+ function = "hgpio7";
+ };
+ jtag2_pins: jtag2-pins {
+ groups = "jtag2";
+ function = "jtag2";
+ };
+ };
};
diff --git a/arch/arm/dts/omap4-u-boot.dtsi b/arch/arm/dts/omap4-u-boot.dtsi
index 4a6bafd6ed..d476bfbc50 100644
--- a/arch/arm/dts/omap4-u-boot.dtsi
+++ b/arch/arm/dts/omap4-u-boot.dtsi
@@ -17,6 +17,14 @@
compatible = "simple-bus";
};
};
+
+ segment@80000 {
+ /* USB OTG */
+ target-module@2b000 {
+ compatible = "simple-bus";
+ };
+ };
+
};
&l4_per {
diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c
index c463c96c74..f955d49471 100644
--- a/arch/arm/mach-omap2/boot-common.c
+++ b/arch/arm/mach-omap2/boot-common.c
@@ -15,6 +15,7 @@
#include <spl.h>
#include <asm/global_data.h>
#include <asm/omap_common.h>
+#include <asm/omap_sec_common.h>
#include <asm/arch/omap.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/sys_proto.h>
@@ -22,6 +23,7 @@
#include <scsi.h>
#include <i2c.h>
#include <remoteproc.h>
+#include <image.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -331,3 +333,17 @@ void arch_preboot_os(void)
ahci_reset((void __iomem *)DWC_AHSATA_BASE);
}
#endif
+
+#ifdef CONFIG_TI_SECURE_DEVICE
+void board_fit_image_post_process(const void *fit, int node, void **p_image,
+ size_t *p_size)
+{
+ secure_boot_verify_image(p_image, p_size);
+}
+
+static void tee_image_process(ulong tee_image, size_t tee_size)
+{
+ secure_tee_install((u32)tee_image);
+}
+U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_TEE, tee_image_process);
+#endif
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 9e58281611..ecb9fa02de 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -33,7 +33,6 @@
#include <asm/emif.h>
#include <asm/gpio.h>
#include <asm/omap_common.h>
-#include <asm/omap_sec_common.h>
#include <asm/omap_mmc.h>
#include <i2c.h>
#include <miiphy.h>
@@ -983,14 +982,6 @@ int board_fit_config_name_match(const char *name)
}
#endif
-#ifdef CONFIG_TI_SECURE_DEVICE
-void board_fit_image_post_process(const void *fit, int node, void **p_image,
- size_t *p_size)
-{
- secure_boot_verify_image(p_image, p_size);
-}
-#endif
-
#if !CONFIG_IS_ENABLED(OF_CONTROL)
static const struct omap_hsmmc_plat am335x_mmc0_plat = {
.base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE,
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index d0b7a14e0e..87e552a470 100644
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -9,7 +9,6 @@
#include <common.h>
#include <eeprom.h>
-#include <image.h>
#include <asm/global_data.h>
#include <dm/uclass.h>
#include <env.h>
@@ -20,7 +19,6 @@
#include <linux/errno.h>
#include <spl.h>
#include <usb.h>
-#include <asm/omap_sec_common.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/mux.h>
@@ -867,18 +865,3 @@ int embedded_dtb_select(void)
return 0;
}
#endif
-
-#ifdef CONFIG_TI_SECURE_DEVICE
-void board_fit_image_post_process(const void *fit, int node, void **p_image,
- size_t *p_size)
-{
- secure_boot_verify_image(p_image, p_size);
-}
-
-void board_tee_image_process(ulong tee_image, size_t tee_size)
-{
- secure_tee_install((u32)tee_image);
-}
-
-U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_TEE, board_tee_image_process);
-#endif
diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c
index 652c40f55c..0e57ee566b 100644
--- a/board/ti/am57xx/board.c
+++ b/board/ti/am57xx/board.c
@@ -11,7 +11,6 @@
#include <env.h>
#include <fastboot.h>
#include <fdt_support.h>
-#include <image.h>
#include <init.h>
#include <malloc.h>
#include <net.h>
@@ -22,7 +21,6 @@
#include <errno.h>
#include <asm/global_data.h>
#include <asm/omap_common.h>
-#include <asm/omap_sec_common.h>
#include <asm/emif.h>
#include <asm/gpio.h>
#include <asm/arch/gpio.h>
@@ -1197,18 +1195,3 @@ static int board_bootmode_has_emmc(void)
return 0;
}
#endif
-
-#ifdef CONFIG_TI_SECURE_DEVICE
-void board_fit_image_post_process(const void *fit, int node, void **p_image,
- size_t *p_size)
-{
- secure_boot_verify_image(p_image, p_size);
-}
-
-void board_tee_image_process(ulong tee_image, size_t tee_size)
-{
- secure_tee_install((u32)tee_image);
-}
-
-U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_TEE, board_tee_image_process);
-#endif
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 1c00e253ff..9cb7e21a9f 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -13,7 +13,6 @@
#include <env.h>
#include <fdt_support.h>
#include <fastboot.h>
-#include <image.h>
#include <init.h>
#include <spl.h>
#include <net.h>
@@ -26,7 +25,6 @@
#include <usb.h>
#include <linux/usb/gadget.h>
#include <asm/omap_common.h>
-#include <asm/omap_sec_common.h>
#include <asm/arch/gpio.h>
#include <asm/arch/dra7xx_iodelay.h>
#include <asm/emif.h>
@@ -1063,18 +1061,3 @@ int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason)
return 0;
}
#endif
-
-#ifdef CONFIG_TI_SECURE_DEVICE
-void board_fit_image_post_process(const void *fit, int node, void **p_image,
- size_t *p_size)
-{
- secure_boot_verify_image(p_image, p_size);
-}
-
-void board_tee_image_process(ulong tee_image, size_t tee_size)
-{
- secure_tee_install((u32)tee_image);
-}
-
-U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_TEE, board_tee_image_process);
-#endif
diff --git a/boot/pxe_utils.c b/boot/pxe_utils.c
index 8133006875..2724313817 100644
--- a/boot/pxe_utils.c
+++ b/boot/pxe_utils.c
@@ -258,6 +258,7 @@ static struct pxe_label *label_create(void)
static void label_destroy(struct pxe_label *label)
{
free(label->name);
+ free(label->kernel_label);
free(label->kernel);
free(label->config);
free(label->append);
@@ -521,28 +522,44 @@ static int label_boot(struct pxe_context *ctx, struct pxe_label *label)
return 1;
}
- if (label->initrd) {
- ulong size;
+ if (get_relfile_envaddr(ctx, label->kernel, "kernel_addr_r",
+ NULL) < 0) {
+ printf("Skipping %s for failure retrieving kernel\n",
+ label->name);
+ return 1;
+ }
+
+ kernel_addr = env_get("kernel_addr_r");
+ /* for FIT, append the configuration identifier */
+ if (label->config) {
+ int len = strlen(kernel_addr) + strlen(label->config) + 1;
+
+ fit_addr = malloc(len);
+ if (!fit_addr) {
+ printf("malloc fail (FIT address)\n");
+ return 1;
+ }
+ snprintf(fit_addr, len, "%s%s", kernel_addr, label->config);
+ kernel_addr = fit_addr;
+ }
+ /* For FIT, the label can be identical to kernel one */
+ if (label->initrd && !strcmp(label->kernel_label, label->initrd)) {
+ initrd_addr_str = kernel_addr;
+ } else if (label->initrd) {
+ ulong size;
if (get_relfile_envaddr(ctx, label->initrd, "ramdisk_addr_r",
&size) < 0) {
printf("Skipping %s for failure retrieving initrd\n",
label->name);
- return 1;
+ goto cleanup;
}
initrd_addr_str = env_get("ramdisk_addr_r");
size = snprintf(initrd_str, sizeof(initrd_str), "%s:%lx",
initrd_addr_str, size);
if (size >= sizeof(initrd_str))
- return 1;
- }
-
- if (get_relfile_envaddr(ctx, label->kernel, "kernel_addr_r",
- NULL) < 0) {
- printf("Skipping %s for failure retrieving kernel\n",
- label->name);
- return 1;
+ goto cleanup;
}
if (label->ipappend & 0x1) {
@@ -572,7 +589,7 @@ static int label_boot(struct pxe_context *ctx, struct pxe_label *label)
strlen(label->append ?: ""),
strlen(ip_str), strlen(mac_str),
sizeof(bootargs));
- return 1;
+ goto cleanup;
}
if (label->append)
@@ -587,21 +604,6 @@ static int label_boot(struct pxe_context *ctx, struct pxe_label *label)
printf("append: %s\n", finalbootargs);
}
- kernel_addr = env_get("kernel_addr_r");
-
- /* for FIT, append the configuration identifier */
- if (label->config) {
- int len = strlen(kernel_addr) + strlen(label->config) + 1;
-
- fit_addr = malloc(len);
- if (!fit_addr) {
- printf("malloc fail (FIT address)\n");
- return 1;
- }
- snprintf(fit_addr, len, "%s%s", kernel_addr, label->config);
- kernel_addr = fit_addr;
- }
-
/*
* fdt usage is optional:
* It handles the following scenarios.
@@ -623,8 +625,11 @@ static int label_boot(struct pxe_context *ctx, struct pxe_label *label)
*/
bootm_argv[3] = env_get("fdt_addr_r");
+ /* For FIT, the label can be identical to kernel one */
+ if (label->fdt && !strcmp(label->kernel_label, label->fdt)) {
+ bootm_argv[3] = kernel_addr;
/* if fdt label is defined then get fdt from server */
- if (bootm_argv[3]) {
+ } else if (bootm_argv[3]) {
char *fdtfile = NULL;
char *fdtfilefree = NULL;
@@ -1165,15 +1170,19 @@ static int parse_label_kernel(char **c, struct pxe_label *label)
if (err < 0)
return err;
+ /* copy the kernel label to compare with FDT / INITRD when FIT is used */
+ label->kernel_label = strdup(label->kernel);
+ if (!label->kernel_label)
+ return -ENOMEM;
+
s = strstr(label->kernel, "#");
if (!s)
return 1;
- label->config = malloc(strlen(s) + 1);
+ label->config = strdup(s);
if (!label->config)
return -ENOMEM;
- strcpy(label->config, s);
*s = 0;
return 1;
@@ -1359,7 +1368,10 @@ static int parse_pxefile_top(struct pxe_context *ctx, char *p, unsigned long bas
break;
case T_PROMPT:
- eol_or_eof(&p);
+ err = parse_integer(&p, &cfg->prompt);
+ // Do not fail if prompt configuration is undefined
+ if (err < 0)
+ eol_or_eof(&p);
break;
case T_EOL:
diff --git a/configs/arbel_evb_defconfig b/configs/arbel_evb_defconfig
index 447b97ef4a..aa857661d9 100644
--- a/configs/arbel_evb_defconfig
+++ b/configs/arbel_evb_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYS_MALLOC_LEN=0x240000
CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x40000
-CONFIG_ENV_OFFSET=0x1C0000
+CONFIG_ENV_OFFSET=0x3C0000
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="nuvoton-npcm845-evb"
@@ -13,7 +13,7 @@ CONFIG_SYS_PROMPT="U-Boot>"
CONFIG_ARCH_NPCM8XX=y
CONFIG_TARGET_ARBEL_EVB=y
CONFIG_SYS_LOAD_ADDR=0x10000000
-CONFIG_ENV_ADDR=0x801C0000
+CONFIG_ENV_ADDR=0x803C0000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_USE_BOOTCOMMAND=y
@@ -22,6 +22,8 @@ CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
CONFIG_SYS_BOOTM_LEN=0x1400000
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
@@ -35,17 +37,25 @@ CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CLK=y
CONFIG_NPCM_GPIO=y
+CONFIG_DM_I2C=y
# CONFIG_INPUT is not set
+CONFIG_NPCM_HOST=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_NPCM=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHY_BROADCOM=y
+CONFIG_DM_MDIO=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_MII=y
+CONFIG_PHY=y
+CONFIG_PHY_NPCM_USB=y
CONFIG_PINCTRL=y
CONFIG_PINCONF=y
+CONFIG_PINCTRL_NPCM8XX=y
CONFIG_DM_RESET=y
CONFIG_RESET_SYSCON=y
CONFIG_DM_SERIAL=y
@@ -53,12 +63,15 @@ CONFIG_NPCM_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_NPCM_FIU_SPI=y
+CONFIG_NPCM_PSPI=y
CONFIG_TIMER=y
CONFIG_NPCM_TIMER=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_NPCM=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_OHCI_NPCM=y
CONFIG_USB_STORAGE=y
# CONFIG_EFI_LOADER is not set
diff --git a/configs/mt7981_emmc_rfb_defconfig b/configs/mt7981_emmc_rfb_defconfig
index 4832a22643..b3b37b6e5e 100644
--- a/configs/mt7981_emmc_rfb_defconfig
+++ b/configs/mt7981_emmc_rfb_defconfig
@@ -62,3 +62,4 @@ CONFIG_MTK_SERIAL=y
CONFIG_FAT_WRITE=y
CONFIG_HEXDUMP=y
# CONFIG_EFI_LOADER is not set
+CONFIG_LMB_MAX_REGIONS=64
diff --git a/configs/mt7981_rfb_defconfig b/configs/mt7981_rfb_defconfig
index c397527887..b7ffb4dfa7 100644
--- a/configs/mt7981_rfb_defconfig
+++ b/configs/mt7981_rfb_defconfig
@@ -64,3 +64,4 @@ CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MTK_SPIM=y
CONFIG_HEXDUMP=y
+CONFIG_LMB_MAX_REGIONS=64
diff --git a/configs/mt7981_sd_rfb_defconfig b/configs/mt7981_sd_rfb_defconfig
index 17592dc22b..85be9bbc50 100644
--- a/configs/mt7981_sd_rfb_defconfig
+++ b/configs/mt7981_sd_rfb_defconfig
@@ -62,3 +62,4 @@ CONFIG_MTK_SERIAL=y
CONFIG_FAT_WRITE=y
CONFIG_HEXDUMP=y
# CONFIG_EFI_LOADER is not set
+CONFIG_LMB_MAX_REGIONS=64
diff --git a/configs/mt7986_rfb_defconfig b/configs/mt7986_rfb_defconfig
index 1363f9dc6d..ac91c93efb 100644
--- a/configs/mt7986_rfb_defconfig
+++ b/configs/mt7986_rfb_defconfig
@@ -64,3 +64,4 @@ CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MTK_SPIM=y
CONFIG_HEXDUMP=y
+CONFIG_LMB_MAX_REGIONS=64
diff --git a/configs/mt7986a_bpir3_emmc_defconfig b/configs/mt7986a_bpir3_emmc_defconfig
index 354159df9b..2d4876f299 100644
--- a/configs/mt7986a_bpir3_emmc_defconfig
+++ b/configs/mt7986a_bpir3_emmc_defconfig
@@ -62,3 +62,4 @@ CONFIG_MTK_SERIAL=y
CONFIG_FAT_WRITE=y
CONFIG_HEXDUMP=y
# CONFIG_EFI_LOADER is not set
+CONFIG_LMB_MAX_REGIONS=64
diff --git a/configs/mt7986a_bpir3_sd_defconfig b/configs/mt7986a_bpir3_sd_defconfig
index db7ef98d80..08edfe7ac4 100644
--- a/configs/mt7986a_bpir3_sd_defconfig
+++ b/configs/mt7986a_bpir3_sd_defconfig
@@ -62,3 +62,4 @@ CONFIG_MTK_SERIAL=y
CONFIG_FAT_WRITE=y
CONFIG_HEXDUMP=y
# CONFIG_EFI_LOADER is not set
+CONFIG_LMB_MAX_REGIONS=64
diff --git a/doc/README.pxe b/doc/README.pxe
index d14d2bdcc9..172201093d 100644
--- a/doc/README.pxe
+++ b/doc/README.pxe
@@ -179,11 +179,19 @@ initrd <path> - if this label is chosen, use tftp to retrieve the initrd
at <path>. it will be stored at the address indicated in
the initrd_addr_r environment variable, and that address
will be passed to bootm.
+ For FIT image, the initrd can be provided with the same value than
+ kernel, including configuration:
+ <path>#<conf>[#<extra-conf[#...]]
+ In this case, kernel_addr_r is passed to bootm.
fdt <path> - if this label is chosen, use tftp to retrieve the fdt blob
at <path>. it will be stored at the address indicated in
the fdt_addr_r environment variable, and that address will
be passed to bootm.
+ For FIT image, the device tree can be provided with the same value
+ than kernel, including configuration:
+ <path>#<conf>[#<extra-conf[#...]]
+ In this case, kernel_addr_r is passed to bootm.
devicetree <path> - if this label is chosen, use tftp to retrieve the fdt blob
at <path>. it will be stored at the address indicated in
diff --git a/drivers/pci/pcie_dw_common.c b/drivers/pci/pcie_dw_common.c
index e66fb1490a..9f8b016d11 100644
--- a/drivers/pci/pcie_dw_common.c
+++ b/drivers/pci/pcie_dw_common.c
@@ -73,6 +73,8 @@ int pcie_dw_prog_outbound_atu_unroll(struct pcie_dw *pci, int index,
upper_32_bits(cpu_addr));
dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LIMIT,
lower_32_bits(cpu_addr + size - 1));
+ dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_UPPER_LIMIT,
+ upper_32_bits(cpu_addr + size - 1));
dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LOWER_TARGET,
lower_32_bits(pci_addr));
dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_UPPER_TARGET,
diff --git a/drivers/pci/pcie_dw_common.h b/drivers/pci/pcie_dw_common.h
index 6b701645af..e0f7796f2a 100644
--- a/drivers/pci/pcie_dw_common.h
+++ b/drivers/pci/pcie_dw_common.h
@@ -32,6 +32,7 @@
#define PCIE_ATU_UNR_LIMIT 0x10
#define PCIE_ATU_UNR_LOWER_TARGET 0x14
#define PCIE_ATU_UNR_UPPER_TARGET 0x18
+#define PCIE_ATU_UNR_UPPER_LIMIT 0x20
#define PCIE_ATU_REGION_INDEX1 (0x1 << 0)
#define PCIE_ATU_REGION_INDEX0 (0x0 << 0)
diff --git a/include/pxe_utils.h b/include/pxe_utils.h
index 4a73b2aace..1e5e8424f5 100644
--- a/include/pxe_utils.h
+++ b/include/pxe_utils.h
@@ -28,6 +28,7 @@
* Create these with the 'label_create' function given below.
*
* name - the name of the menu as given on the 'menu label' line.
+ * kernel_label - the kernel label, including FIT config if present.
* kernel - the path to the kernel file to use for this label.
* append - kernel command line to use when booting this label
* initrd - path to the initrd to use for this label.
@@ -40,6 +41,7 @@ struct pxe_label {
char num[4];
char *name;
char *menu;
+ char *kernel_label;
char *kernel;
char *config;
char *append;
generated by cgit v1.2.3 (git 2.39.0) at 2024-07-23 23:29:56 +0300