diff options
author | William Zhang <william.zhang@broadcom.com> | 2022-08-01 21:39:24 +0300 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2022-10-31 15:54:43 +0300 |
commit | 4054fd71821a7b06792b1149b53d5b6bf6281006 (patch) | |
tree | fe50e30dfc1de30152e666c3ef3ef2b633d47267 | |
parent | 4cab03842cec272513d198b749e02e181187e000 (diff) | |
download | u-boot-4054fd71821a7b06792b1149b53d5b6bf6281006.tar.xz |
arm: bcmbca: add bcm6756 SoC support
BCM6756 is an ARM A7 based WLAN Gateway and Access Point Broadband SoC.
It is part of the BCA(Broadband Carrier Access origin) chipset family so
it's added under ARCH_BCMBCA platform. This initial support includes a
bare-bone implementation and dts with CPU subsystem, memory and ARM
PL011 uart.
This SoC is supported in the linux-next git repository so the dts and
dtsi files are copied from linux.
The u-boot image can be loaded from flash or network to the entry
point address in the memory and boot from there.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
-rw-r--r-- | MAINTAINERS | 1 | ||||
-rw-r--r-- | arch/arm/dts/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/dts/bcm6756.dtsi | 130 | ||||
-rw-r--r-- | arch/arm/dts/bcm96756.dts | 30 | ||||
-rw-r--r-- | arch/arm/mach-bcmbca/Kconfig | 8 | ||||
-rw-r--r-- | arch/arm/mach-bcmbca/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/mach-bcmbca/bcm6756/Kconfig | 17 | ||||
-rw-r--r-- | arch/arm/mach-bcmbca/bcm6756/Makefile | 5 | ||||
-rw-r--r-- | board/broadcom/bcmbca/Kconfig | 15 | ||||
-rw-r--r-- | configs/bcm96756_defconfig | 23 | ||||
-rw-r--r-- | include/configs/bcm96756.h | 11 |
11 files changed, 239 insertions, 4 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 74a240bbda..5252765b05 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -219,6 +219,7 @@ F: board/broadcom/bcmbca/ N: bcmbca N: bcm[9]?47622 N: bcm[9]?63178 +N: bcm[9]?6756 N: bcm[9]?6846 N: bcm[9]?6878 diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index d0996a11fc..2545575db6 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1184,6 +1184,8 @@ dtb-$(CONFIG_BCM47622) += \ bcm947622.dtb dtb-$(CONFIG_BCM63178) += \ bcm963178.dtb +dtb-$(CONFIG_BCM6756) += \ + bcm96756.dtb dtb-$(CONFIG_BCM6846) += \ bcm96846.dtb dtb-$(CONFIG_BCM6878) += \ diff --git a/arch/arm/dts/bcm6756.dtsi b/arch/arm/dts/bcm6756.dtsi new file mode 100644 index 0000000000..ce1b59faf8 --- /dev/null +++ b/arch/arm/dts/bcm6756.dtsi @@ -0,0 +1,130 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + compatible = "brcm,bcm6756", "brcm,bcmbca"; + #address-cells = <1>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + CA7_0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x0>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + CA7_1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x1>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + CA7_2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x2>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + CA7_3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x3>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + arm,cpu-registers-not-fw-configured; + }; + + pmu: pmu { + compatible = "arm,cortex-a7-pmu"; + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&CA7_0>, <&CA7_1>, + <&CA7_2>, <&CA7_3>; + }; + + clocks: clocks { + periph_clk: periph-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + + uart_clk: uart-clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&periph_clk>; + clock-div = <4>; + clock-mult = <1>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + axi@81000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x81000000 0x8000>; + + gic: interrupt-controller@1000 { + compatible = "arm,cortex-a7-gic"; + #interrupt-cells = <3>; + interrupt-controller; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + reg = <0x1000 0x1000>, + <0x2000 0x2000>, + <0x4000 0x2000>, + <0x6000 0x2000>; + }; + }; + + bus@ff800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xff800000 0x800000>; + + uart0: serial@12000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x12000 0x1000>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&uart_clk>, <&uart_clk>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/dts/bcm96756.dts b/arch/arm/dts/bcm96756.dts new file mode 100644 index 0000000000..9a4a87ba9c --- /dev/null +++ b/arch/arm/dts/bcm96756.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2019 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm6756.dtsi" + +/ { + model = "Broadcom BCM96756 Reference Board"; + compatible = "brcm,bcm96756", "brcm,bcm6756", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +}; diff --git a/arch/arm/mach-bcmbca/Kconfig b/arch/arm/mach-bcmbca/Kconfig index 5b67975c45..f3104116b3 100644 --- a/arch/arm/mach-bcmbca/Kconfig +++ b/arch/arm/mach-bcmbca/Kconfig @@ -19,6 +19,13 @@ config BCM63178 select DM_SERIAL select PL01X_SERIAL +config BCM6756 + bool "Support for Broadcom 6756 Family" + select SYS_ARCH_TIMER + select CPU_V7A + select DM_SERIAL + select PL01X_SERIAL + config BCM6846 bool "Support for Broadcom 6846 Family" select SYS_ARCH_TIMER @@ -35,6 +42,7 @@ config BCM6878 source "arch/arm/mach-bcmbca/bcm47622/Kconfig" source "arch/arm/mach-bcmbca/bcm63178/Kconfig" +source "arch/arm/mach-bcmbca/bcm6756/Kconfig" source "arch/arm/mach-bcmbca/bcm6846/Kconfig" source "arch/arm/mach-bcmbca/bcm6878/Kconfig" diff --git a/arch/arm/mach-bcmbca/Makefile b/arch/arm/mach-bcmbca/Makefile index 87710c66f9..5eb483c167 100644 --- a/arch/arm/mach-bcmbca/Makefile +++ b/arch/arm/mach-bcmbca/Makefile @@ -5,5 +5,6 @@ obj-$(CONFIG_BCM47622) += bcm47622/ obj-$(CONFIG_BCM63178) += bcm63178/ +obj-$(CONFIG_BCM6756) += bcm6756/ obj-$(CONFIG_BCM6846) += bcm6846/ obj-$(CONFIG_BCM6878) += bcm6878/ diff --git a/arch/arm/mach-bcmbca/bcm6756/Kconfig b/arch/arm/mach-bcmbca/bcm6756/Kconfig new file mode 100644 index 0000000000..c83dcd0f3e --- /dev/null +++ b/arch/arm/mach-bcmbca/bcm6756/Kconfig @@ -0,0 +1,17 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2022 Broadcom Ltd +# + +if BCM6756 + +config TARGET_BCM96756 + bool "Broadcom 6756 Reference Board" + depends on ARCH_BCMBCA + +config SYS_SOC + default "bcm6756" + +source "board/broadcom/bcmbca/Kconfig" + +endif diff --git a/arch/arm/mach-bcmbca/bcm6756/Makefile b/arch/arm/mach-bcmbca/bcm6756/Makefile new file mode 100644 index 0000000000..beb979af75 --- /dev/null +++ b/arch/arm/mach-bcmbca/bcm6756/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2022 Broadcom Ltd +# +obj- += dummy.o diff --git a/board/broadcom/bcmbca/Kconfig b/board/broadcom/bcmbca/Kconfig index 2d95deec66..89c02cf054 100644 --- a/board/broadcom/bcmbca/Kconfig +++ b/board/broadcom/bcmbca/Kconfig @@ -16,17 +16,17 @@ config SYS_CONFIG_NAME endif -if TARGET_BCM96878 +if TARGET_BCM963178 config SYS_CONFIG_NAME - default "bcm96878" + default "bcm963178" endif -if TARGET_BCM963178 +if TARGET_BCM96756 config SYS_CONFIG_NAME - default "bcm963178" + default "bcm96756" endif @@ -36,3 +36,10 @@ config SYS_CONFIG_NAME default "bcm96846" endif + +if TARGET_BCM96878 + +config SYS_CONFIG_NAME + default "bcm96878" + +endif diff --git a/configs/bcm96756_defconfig b/configs/bcm96756_defconfig new file mode 100644 index 0000000000..8152673b20 --- /dev/null +++ b/configs/bcm96756_defconfig @@ -0,0 +1,23 @@ +CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=50000000 +CONFIG_ARCH_BCMBCA=y +CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_BCM6756=y +CONFIG_TARGET_BCM96756=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="bcm96756" +CONFIG_IDENT_STRING=" Broadcom BCM6756" +CONFIG_SYS_LOAD_ADDR=0x01000000 +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 +CONFIG_CMD_CACHE=y +CONFIG_OF_EMBED=y +CONFIG_CLK=y diff --git a/include/configs/bcm96756.h b/include/configs/bcm96756.h new file mode 100644 index 0000000000..c8f32672b7 --- /dev/null +++ b/include/configs/bcm96756.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2022 Broadcom Ltd. + */ + +#ifndef __BCM96756_H +#define __BCM96756_H + +#define CONFIG_SYS_SDRAM_BASE 0x00000000 + +#endif |