diff options
author | Frieder Schrempf <frieder.schrempf@kontron.de> | 2022-08-24 16:59:12 +0300 |
---|---|---|
committer | Stefano Babic <sbabic@denx.de> | 2022-10-20 18:35:51 +0300 |
commit | 8dd0924ea084cb3da608051a5047cb49701ab3c4 (patch) | |
tree | cdd86b4dd9b3c86326e00ad402310133ca71a5ef | |
parent | 890022f0cf622608b1d43e8b44eda67e62104891 (diff) | |
download | u-boot-8dd0924ea084cb3da608051a5047cb49701ab3c4.tar.xz |
imx: kontron-sl-mx8mm: Remove 100mt DDR setpoint
The new stable configuration is missing the 100mt setpoint, remove
it before updating the config to make sure the changes are separated
cleanly.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
-rw-r--r-- | arch/arm/dts/imx8mm-kontron-n801x-som.dtsi | 4 | ||||
-rw-r--r-- | board/kontron/sl-mx8mm/lpddr4_timing.c | 49 | ||||
-rw-r--r-- | board/kontron/sl-mx8mm/spl.c | 2 |
3 files changed, 1 insertions, 54 deletions
diff --git a/arch/arm/dts/imx8mm-kontron-n801x-som.dtsi b/arch/arm/dts/imx8mm-kontron-n801x-som.dtsi index 3b66e56092..39c0ce19ef 100644 --- a/arch/arm/dts/imx8mm-kontron-n801x-som.dtsi +++ b/arch/arm/dts/imx8mm-kontron-n801x-som.dtsi @@ -46,10 +46,6 @@ ddrc_opp_table: opp-table { compatible = "operating-points-v2"; - opp-25M { - opp-hz = /bits/ 64 <25000000>; - }; - opp-100M { opp-hz = /bits/ 64 <100000000>; }; diff --git a/board/kontron/sl-mx8mm/lpddr4_timing.c b/board/kontron/sl-mx8mm/lpddr4_timing.c index a8dcaafb18..cdde6ac0dc 100644 --- a/board/kontron/sl-mx8mm/lpddr4_timing.c +++ b/board/kontron/sl-mx8mm/lpddr4_timing.c @@ -1121,46 +1121,6 @@ struct dram_cfg_param ddr_fsp1_cfg[] = { { 0xd0000, 0x1 }, }; -/* P2 message block paremeter for training firmware */ -struct dram_cfg_param ddr_fsp2_cfg[] = { - { 0xd0000, 0x0 }, - { 0x54002, 0x102 }, - { 0x54003, 0x64 }, - { 0x54004, 0x2 }, - { 0x54005, 0x2228 }, - { 0x54006, 0x11 }, - { 0x54008, 0x121f }, - { 0x54009, 0xc8 }, - { 0x5400b, 0x2 }, - { 0x5400d, 0x100 }, - { 0x54012, 0x310 }, - { 0x54019, 0x84 }, - { 0x5401a, 0x31 }, - { 0x5401b, 0x4d66 }, - { 0x5401c, 0x4d00 }, - { 0x5401e, 0x16 }, - { 0x5401f, 0x84 }, - { 0x54020, 0x31 }, - { 0x54021, 0x4d66 }, - { 0x54022, 0x4d00 }, - { 0x54024, 0x16 }, - { 0x5402b, 0x1000 }, - { 0x5402c, 0x3 }, - { 0x54032, 0x8400 }, - { 0x54033, 0x3100 }, - { 0x54034, 0x6600 }, - { 0x54035, 0x4d }, - { 0x54036, 0x4d }, - { 0x54037, 0x1600 }, - { 0x54038, 0x8400 }, - { 0x54039, 0x3100 }, - { 0x5403a, 0x6600 }, - { 0x5403b, 0x4d }, - { 0x5403c, 0x4d }, - { 0x5403d, 0x1600 }, - { 0xd0000, 0x1 }, -}; - /* P0 2D message block paremeter for training firmware */ struct dram_cfg_param ddr_fsp0_2d_cfg[] = { { 0xd0000, 0x0 }, @@ -1813,13 +1773,6 @@ struct dram_fsp_msg ddr_dram_fsp_msg[] = { .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), }, { - /* P2 100mts 1D */ - .drate = 100, - .fw_type = FW_1D_IMAGE, - .fsp_cfg = ddr_fsp2_cfg, - .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), - }, - { /* P0 3000mts 2D */ .drate = 3000, .fw_type = FW_2D_IMAGE, @@ -1840,5 +1793,5 @@ struct dram_timing_info dram_timing = { .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), .ddrphy_pie = ddr_phy_pie, .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), - .fsp_table = { 3000, 400, 100, }, + .fsp_table = { 3000, 400, }, }; diff --git a/board/kontron/sl-mx8mm/spl.c b/board/kontron/sl-mx8mm/spl.c index 2a562f4ac9..447da13984 100644 --- a/board/kontron/sl-mx8mm/spl.c +++ b/board/kontron/sl-mx8mm/spl.c @@ -95,8 +95,6 @@ static void spl_dram_init(void) dram_timing.fsp_msg[1].fsp_cfg[22].val = 0x1; dram_timing.fsp_msg[2].fsp_cfg[10].val = 0x110; dram_timing.fsp_msg[2].fsp_cfg[22].val = 0x1; - dram_timing.fsp_msg[3].fsp_cfg[10].val = 0x110; - dram_timing.fsp_msg[3].fsp_cfg[22].val = 0x1; if (!ddr_init(&dram_timing)) { if (check_ram_available(SZ_2G)) |