diff options
author | Tom Rini <trini@konsulko.com> | 2021-09-29 02:18:56 +0300 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2021-09-29 02:18:56 +0300 |
commit | ba17871884c10f64082ddba2f0632ec44a3ae490 (patch) | |
tree | 57a40015688fa395170307950c11cc528472b85e | |
parent | 68545c1ac123520598eacc0e5078da2730a1916a (diff) | |
parent | 4b62ba8fa297183e74049d7aca855000134bafc9 (diff) | |
download | u-boot-ba17871884c10f64082ddba2f0632ec44a3ae490.tar.xz |
Merge branch '2021-09-25-TI-platform-updates' into next
- Start moving some TI board docs to rST
- Assorted TI-specific Kconfig migrations and namespace cleanups. This
also allows for some code cleanups.
56 files changed, 229 insertions, 595 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index f322775161..9e44817a40 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -929,7 +929,7 @@ endif dtb-$(CONFIG_RZA1) += \ r7s72100-gr-peach-u-boot.dtb -dtb-$(CONFIG_SOC_KEYSTONE) += keystone-k2hk-evm.dtb \ +dtb-$(CONFIG_ARCH_KEYSTONE) += keystone-k2hk-evm.dtb \ keystone-k2l-evm.dtb \ keystone-k2e-evm.dtb \ keystone-k2g-evm.dtb \ diff --git a/arch/arm/mach-keystone/Kconfig b/arch/arm/mach-keystone/Kconfig index e06eba5aea..94e6fe1f22 100644 --- a/arch/arm/mach-keystone/Kconfig +++ b/arch/arm/mach-keystone/Kconfig @@ -6,6 +6,7 @@ choice config TARGET_K2HK_EVM bool "TI Keystone 2 Kepler/Hawking EVM" + select SOC_K2HK select SPL_BOARD_INIT if SPL select CMD_DDR3 imply DM_I2C @@ -14,6 +15,7 @@ config TARGET_K2HK_EVM config TARGET_K2E_EVM bool "TI Keystone 2 Edison EVM" + select SOC_K2E select SPL_BOARD_INIT if SPL select CMD_DDR3 imply DM_I2C @@ -22,6 +24,7 @@ config TARGET_K2E_EVM config TARGET_K2L_EVM bool "TI Keystone 2 Lamar EVM" + select SOC_K2L select SPL_BOARD_INIT if SPL select CMD_DDR3 imply DM_I2C @@ -31,6 +34,7 @@ config TARGET_K2L_EVM config TARGET_K2G_EVM bool "TI Keystone 2 Galileo EVM" select BOARD_LATE_INIT + select SOC_K2G select SPL_BOARD_INIT if SPL select TI_I2C_BOARD_DETECT select CMD_DDR3 @@ -40,6 +44,18 @@ config TARGET_K2G_EVM endchoice +config SOC_K2E + bool + +config SOC_K2G + bool + +config SOC_K2HK + bool + +config SOC_K2L + bool + config SYS_SOC default "keystone" diff --git a/board/compulab/common/eeprom.c b/board/compulab/common/eeprom.c index 05ce33e8d6..c4b257f851 100644 --- a/board/compulab/common/eeprom.c +++ b/board/compulab/common/eeprom.c @@ -385,43 +385,8 @@ int eeprom_field_update_date(struct eeprom_field *field, char *value) #define LAYOUT_VERSION_VER2 3 #define LAYOUT_VERSION_VER3 4 -extern struct eeprom_field layout_unknown[1]; - #define DEFINE_PRINT_UPDATE(x) eeprom_field_print_##x, eeprom_field_update_##x -#ifdef CONFIG_CM_T3X -struct eeprom_field layout_legacy[5] = { - { "MAC address", 6, NULL, DEFINE_PRINT_UPDATE(mac) }, - { "Board Revision", 2, NULL, DEFINE_PRINT_UPDATE(bin) }, - { "Serial Number", 8, NULL, DEFINE_PRINT_UPDATE(bin) }, - { "Board Configuration", 64, NULL, DEFINE_PRINT_UPDATE(ascii) }, - { RESERVED_FIELDS, 176, NULL, eeprom_field_print_reserved, - eeprom_field_update_ascii }, -}; -#else -#define layout_legacy layout_unknown -#endif - -#if defined(CONFIG_CM_T3X) -struct eeprom_field layout_v1[12] = { - { "Major Revision", 2, NULL, DEFINE_PRINT_UPDATE(bin_ver) }, - { "Minor Revision", 2, NULL, DEFINE_PRINT_UPDATE(bin_ver) }, - { "1st MAC Address", 6, NULL, DEFINE_PRINT_UPDATE(mac) }, - { "2nd MAC Address", 6, NULL, DEFINE_PRINT_UPDATE(mac) }, - { "Production Date", 4, NULL, DEFINE_PRINT_UPDATE(date) }, - { "Serial Number", 12, NULL, DEFINE_PRINT_UPDATE(bin_rev) }, - { RESERVED_FIELDS, 96, NULL, DEFINE_PRINT_UPDATE(reserved) }, - { "Product Name", 16, NULL, DEFINE_PRINT_UPDATE(ascii) }, - { "Product Options #1", 16, NULL, DEFINE_PRINT_UPDATE(ascii) }, - { "Product Options #2", 16, NULL, DEFINE_PRINT_UPDATE(ascii) }, - { "Product Options #3", 16, NULL, DEFINE_PRINT_UPDATE(ascii) }, - { RESERVED_FIELDS, 64, NULL, eeprom_field_print_reserved, - eeprom_field_update_ascii }, -}; -#else -#define layout_v1 layout_unknown -#endif - struct eeprom_field layout_v2[15] = { { "Major Revision", 2, NULL, DEFINE_PRINT_UPDATE(bin_ver) }, { "Minor Revision", 2, NULL, DEFINE_PRINT_UPDATE(bin_ver) }, @@ -464,14 +429,6 @@ struct eeprom_field layout_v3[16] = { void eeprom_layout_assign(struct eeprom_layout *layout, int layout_version) { switch (layout->layout_version) { - case LAYOUT_VERSION_LEGACY: - layout->fields = layout_legacy; - layout->num_of_fields = ARRAY_SIZE(layout_legacy); - break; - case LAYOUT_VERSION_VER1: - layout->fields = layout_v1; - layout->num_of_fields = ARRAY_SIZE(layout_v1); - break; case LAYOUT_VERSION_VER2: layout->fields = layout_v2; layout->num_of_fields = ARRAY_SIZE(layout_v2); diff --git a/board/davinci/da8xxevm/Makefile b/board/davinci/da8xxevm/Makefile index 3fac615d7b..8187c8db22 100644 --- a/board/davinci/da8xxevm/Makefile +++ b/board/davinci/da8xxevm/Makefile @@ -7,4 +7,4 @@ obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += da830evm.o obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += da850evm.o -obj-$(CONFIG_MACH_OMAPL138_LCDK) += omapl138_lcdk.o +obj-$(CONFIG_TARGET_OMAPL138_LCDK) += omapl138_lcdk.o @@ -624,7 +624,7 @@ static int do_fdt(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) fdt_strerror(err)); return CMD_RET_FAILURE; } -#ifdef CONFIG_SOC_KEYSTONE +#ifdef CONFIG_ARCH_KEYSTONE ft_board_setup_ex(working_fdt, gd->bd); #endif } diff --git a/common/image-fdt.c b/common/image-fdt.c index 9441e63a3d..b698e961fe 100644 --- a/common/image-fdt.c +++ b/common/image-fdt.c @@ -628,7 +628,7 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob, if (!ft_verify_fdt(blob)) goto err; -#if defined(CONFIG_SOC_KEYSTONE) +#if defined(CONFIG_ARCH_KEYSTONE) if (IMAGE_OF_BOARD_SETUP) ft_board_setup_ex(blob, gd->bd); #endif diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index 1234aa2251..864d16cf01 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -77,6 +77,8 @@ CONFIG_DM_SPI=y CONFIG_OMAP3_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_HAS_OMAP_EHCI_PHY1_RESET_GPIO=y +CONFIG_OMAP_EHCI_PHY1_RESET_GPIO=57 CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_AM35X=y CONFIG_BCH=y diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index 4960ec2168..b60090d4c3 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -78,11 +78,11 @@ CONFIG_DM_USB_GADGET=y CONFIG_SPL_DM_USB_GADGET=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_OMAP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_OMAP=y CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_DWC3_PHY_OMAP=y -CONFIG_OMAP_USB_PHY=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" CONFIG_USB_GADGET_VENDOR_NUM=0x0403 diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig index ebb46d412f..31b564b7ba 100644 --- a/configs/am43xx_evm_qspiboot_defconfig +++ b/configs/am43xx_evm_qspiboot_defconfig @@ -57,10 +57,10 @@ CONFIG_TI_QSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_OMAP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_OMAP=y CONFIG_USB_DWC3_PHY_OMAP=y -CONFIG_OMAP_USB_PHY=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" CONFIG_USB_GADGET_VENDOR_NUM=0x0403 diff --git a/configs/am43xx_evm_rtconly_defconfig b/configs/am43xx_evm_rtconly_defconfig index 5a17045587..a4450cc0d9 100644 --- a/configs/am43xx_evm_rtconly_defconfig +++ b/configs/am43xx_evm_rtconly_defconfig @@ -60,10 +60,10 @@ CONFIG_OMAP_TIMER=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_OMAP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_OMAP=y CONFIG_USB_DWC3_PHY_OMAP=y -CONFIG_OMAP_USB_PHY=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" CONFIG_USB_GADGET_VENDOR_NUM=0x0403 diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig index 14148b2094..9efeccc1e5 100644 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -79,11 +79,11 @@ CONFIG_OMAP_TIMER=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_OMAP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_OMAP=y CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_DWC3_PHY_OMAP=y -CONFIG_OMAP_USB_PHY=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" CONFIG_USB_GADGET_VENDOR_NUM=0x0403 diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig index 820fc07547..f34013053f 100644 --- a/configs/am43xx_hs_evm_defconfig +++ b/configs/am43xx_hs_evm_defconfig @@ -83,11 +83,11 @@ CONFIG_DM_USB_GADGET=y CONFIG_SPL_DM_USB_GADGET=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_OMAP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_OMAP=y CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_DWC3_PHY_OMAP=y -CONFIG_OMAP_USB_PHY=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" CONFIG_USB_GADGET_VENDOR_NUM=0x0403 diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index 0975182568..9a038a6bc6 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -108,6 +108,7 @@ CONFIG_DM_USB_GADGET=y CONFIG_SPL_DM_USB_GADGET=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_OMAP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_GADGET=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index e07f6cfe1a..0a99df487e 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -104,6 +104,7 @@ CONFIG_DM_USB_GADGET=y CONFIG_SPL_DM_USB_GADGET=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_OMAP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_GADGET=y diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index 6cb8d0ea0f..dbbe18d51b 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -112,6 +112,7 @@ CONFIG_DM_USB_GADGET=y CONFIG_SPL_DM_USB_GADGET=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_OMAP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_GADGET=y diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig index 18fbcf0e58..45b41d3fca 100644 --- a/configs/cm_t43_defconfig +++ b/configs/cm_t43_defconfig @@ -91,4 +91,4 @@ CONFIG_OMAP3_SPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y -CONFIG_OMAP_USB_PHY=y +CONFIG_USB_XHCI_OMAP=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 53e4d82795..11dc022b6c 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -124,6 +124,7 @@ CONFIG_DM_USB_GADGET=y CONFIG_SPL_DM_USB_GADGET=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_OMAP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_OMAP=y CONFIG_USB_DWC3_GENERIC=y diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index 59d5a912cd..c231991ea5 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -127,6 +127,7 @@ CONFIG_DM_USB_GADGET=y CONFIG_SPL_DM_USB_GADGET=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_OMAP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_OMAP=y CONFIG_USB_DWC3_GENERIC=y diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig index 1e3a82511e..09aa07379a 100644 --- a/configs/dra7xx_hs_evm_usb_defconfig +++ b/configs/dra7xx_hs_evm_usb_defconfig @@ -121,6 +121,7 @@ CONFIG_DM_USB_GADGET=y CONFIG_SPL_DM_USB_GADGET=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_OMAP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_GADGET=y diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig index 4e31f77049..9f3a88f28e 100644 --- a/configs/omap35_logic_somlv_defconfig +++ b/configs/omap35_logic_somlv_defconfig @@ -82,6 +82,8 @@ CONFIG_OMAP3_SPI=y CONFIG_USB=y # CONFIG_SPL_DM_USB is not set CONFIG_USB_EHCI_HCD=y +CONFIG_HAS_OMAP_EHCI_PHY1_RESET_GPIO=y +CONFIG_OMAP_EHCI_PHY1_RESET_GPIO=4 CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_OMAP2PLUS=y CONFIG_TWL4030_USB=y diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig index 89b2bff592..578e6829ff 100644 --- a/configs/omap3_beagle_defconfig +++ b/configs/omap3_beagle_defconfig @@ -84,6 +84,8 @@ CONFIG_OMAP3_SPI=y CONFIG_USB=y # CONFIG_SPL_DM_USB is not set CONFIG_USB_EHCI_HCD=y +CONFIG_HAS_OMAP_EHCI_PHY1_RESET_GPIO=y +CONFIG_OMAP_EHCI_PHY1_RESET_GPIO=147 CONFIG_USB_OMAP3=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_MUSB_OMAP2PLUS=y diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig index 96f9c6bcaa..7a78682bf6 100644 --- a/configs/omap3_logic_somlv_defconfig +++ b/configs/omap3_logic_somlv_defconfig @@ -83,6 +83,8 @@ CONFIG_OMAP3_SPI=y CONFIG_USB=y # CONFIG_SPL_DM_USB is not set CONFIG_USB_EHCI_HCD=y +CONFIG_HAS_OMAP_EHCI_PHY1_RESET_GPIO=y +CONFIG_OMAP_EHCI_PHY1_RESET_GPIO=4 CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_OMAP2PLUS=y CONFIG_TWL4030_USB=y diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig index 687e3865e7..8c6baaf4fd 100644 --- a/configs/omap4_panda_defconfig +++ b/configs/omap4_panda_defconfig @@ -40,6 +40,10 @@ CONFIG_CONS_INDEX=3 CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_HAS_OMAP_EHCI_PHY1_RESET_GPIO=y +CONFIG_OMAP_EHCI_PHY1_RESET_GPIO=1 +CONFIG_HAS_OMAP_EHCI_PHY2_RESET_GPIO=y +CONFIG_OMAP_EHCI_PHY2_RESET_GPIO=62 CONFIG_USB_OMAP3=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_SMSC95XX=y diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig index 0436463e08..0280b4ac8d 100644 --- a/configs/omap5_uevm_defconfig +++ b/configs/omap5_uevm_defconfig @@ -49,6 +49,10 @@ CONFIG_CONS_INDEX=3 CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_HAS_OMAP_EHCI_PHY2_RESET_GPIO=y +CONFIG_OMAP_EHCI_PHY2_RESET_GPIO=80 +CONFIG_HAS_OMAP_EHCI_PHY3_RESET_GPIO=y +CONFIG_OMAP_EHCI_PHY3_RESET_GPIO=79 CONFIG_USB_DWC3=y CONFIG_USB_DWC3_OMAP=y CONFIG_USB_DWC3_PHY_OMAP=y diff --git a/board/ti/am335x/README b/doc/board/ti/am335x_evm.rst index 19e0eccbac..a90f32da7a 100644 --- a/board/ti/am335x/README +++ b/doc/board/ti/am335x_evm.rst @@ -1,21 +1,24 @@ +.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +.. sectionauthor:: Tom Rini <trini@konsulko.com> + Summary ======= -This document covers various features of the 'am335x_evm' build, and some of -the related build targets (am335x_evm_uartN, etc). +This document covers various features of the `am335x_evm` default +configuration, some of the related defconfigs, and how to enable hardware +features not present by default in the defconfigs. Hardware -======== +-------- The binary produced by this board supports, based on parsing of the EEPROM documented in TI's reference designs: -- AM335x GP EVM -- AM335x EVM SK -- Beaglebone White -- Beaglebone Black +* AM335x GP EVM +* AM335x EVM SK +* The Beaglebone family of designs Customization -============= +------------- Given that all of the above boards are reference platforms (and the Beaglebone platforms are OSHA), it is likely that this platform code and @@ -24,24 +27,21 @@ worth noting that aside from things such as NAND or MMC only being required if a custom platform makes use of these blocks, the following are required, depending on design: -- GPIO is only required if DDR3 power is controlled in a way similar to - EVM SK -- SPI is only required for SPI flash, or exposing the SPI bus. +* GPIO is only required if DDR3 power is controlled in a way similar to EVM SK +* SPI is only required for SPI flash, or exposing the SPI bus. The following blocks are required: -- I2C, to talk with the PMIC and ensure that we do not run afoul of + +* I2C, to talk with the PMIC and ensure that we do not run afoul of errata 1.0.24. -When removing options as part of customization, -CONFIG_EXTRA_ENV_SETTINGS will need additional care to update for your -needs and to remove no longer relevant options as in some cases we -define additional text blocks (such as for NAND or DFU strings). Also -note that all of the SPL options are grouped together, rather than with -the IP blocks, so both areas will need their choices updated to reflect -the custom design. +When removing options as part of customization, note that you will likely need +to look at both `include/configs/am335x_evm.h`, +`include/configs/ti_am335x_common.h` and `include/configs/am335x_evm.h` as the +migration to Kconfig is not yet complete. NAND -==== +---- The AM335x GP EVM ships with a 256MiB NAND available in most profiles. In this example to program the NAND we assume that an SD card has been @@ -58,6 +58,9 @@ Step-1: Building u-boot for NAND boot CONFIG_NAND_OMAP_ECCSCHEME (refer doc/README.nand) Step-2: Flashing NAND via MMC/SD + +.. code-block:: text + # select BOOTSEL to MMC/SD boot and boot from MMC/SD card U-Boot # mmc rescan # erase flash @@ -83,31 +86,9 @@ Step-2: Flashing NAND via MMC/SD Step-3: Set BOOTSEL pin to select NAND boot, and POR the device. The device should boot from images flashed on NAND device. -NOR -=== - -The Beaglebone White can be equipped with a "memory cape" that in turn can -have a NOR module plugged into it. In this case it is then possible to -program and boot from NOR. Note that due to how U-Boot is designed we -must build a specific version of U-Boot that knows we have NOR flash. This -build is named 'am335x_evm_nor'. Further, we have a 'am335x_evm_norboot' -build that will assume that the environment is on NOR rather than NAND. In -the following example we assume that and SD card has been populated with -MLO and u-boot.img from a 'am335x_evm_nor' build and also contains the -'u-boot.bin' from a 'am335x_evm_norboot' build. When booting from NOR, a -binary must be written to the start of NOR, with no header or similar -prepended. In the following example we use a size of 512KiB (0x80000) -as that is how much space we set aside before the environment, as per -the config file. - -U-Boot # mmc rescan -U-Boot # load mmc 0 ${loadaddr} u-boot.bin -U-Boot # protect off 08000000 +80000 -U-Boot # erase 08000000 +80000 -U-Boot # cp.b ${loadaddr} 08000000 ${filesize} Falcon Mode -=========== +----------- The default build includes "Falcon Mode" (see doc/README.falcon) via NAND, eMMC (or raw SD cards) and FAT SD cards. Our default behavior currently is @@ -119,18 +100,20 @@ boards with multiple boot methods, recovery should not be an issue in this worst-case however. Falcon Mode: eMMC -================= +----------------- The recommended layout in this case is: -MMC BLOCKS |--------------------------------| LOCATION IN BYTES -0x0000 - 0x007F : MBR or GPT table : 0x000000 - 0x020000 -0x0080 - 0x00FF : ARGS or FDT file : 0x010000 - 0x020000 -0x0100 - 0x01FF : SPL.backup1 (first copy used) : 0x020000 - 0x040000 -0x0200 - 0x02FF : SPL.backup2 (second copy used) : 0x040000 - 0x060000 -0x0300 - 0x06FF : U-Boot : 0x060000 - 0x0e0000 -0x0700 - 0x08FF : U-Boot Env + Redundant : 0x0e0000 - 0x120000 -0x0900 - 0x28FF : Kernel : 0x120000 - 0x520000 +.. code-block:: text + + MMC BLOCKS |--------------------------------| LOCATION IN BYTES + 0x0000 - 0x007F : MBR or GPT table : 0x000000 - 0x020000 + 0x0080 - 0x00FF : ARGS or FDT file : 0x010000 - 0x020000 + 0x0100 - 0x01FF : SPL.backup1 (first copy used) : 0x020000 - 0x040000 + 0x0200 - 0x02FF : SPL.backup2 (second copy used) : 0x040000 - 0x060000 + 0x0300 - 0x06FF : U-Boot : 0x060000 - 0x0e0000 + 0x0700 - 0x08FF : U-Boot Env + Redundant : 0x0e0000 - 0x120000 + 0x0900 - 0x28FF : Kernel : 0x120000 - 0x520000 Note that when we run 'spl export' it will prepare to boot the kernel. This includes relocation of the uImage from where we loaded it to the entry @@ -144,28 +127,30 @@ had a FAT partition (such as on a Beaglebone Black) it is not enough to write garbage into the area, you must delete it from the partition table first. -# Ensure we are able to talk with this mmc device -U-Boot # mmc rescan -U-Boot # tftp 81000000 am335x/MLO -# Write to two of the backup locations ROM uses -U-Boot # mmc write 81000000 100 100 -U-Boot # mmc write 81000000 200 100 -# Write U-Boot to the location set in the config -U-Boot # tftp 81000000 am335x/u-boot.img -U-Boot # mmc write 81000000 300 400 -# Load kernel and device tree into memory, perform export -U-Boot # tftp 81000000 am335x/uImage -U-Boot # run findfdt -U-Boot # tftp ${fdtaddr} am335x/${fdtfile} -U-Boot # run mmcargs -U-Boot # spl export fdt 81000000 - ${fdtaddr} -# Write the updated device tree to MMC -U-Boot # mmc write ${fdtaddr} 80 80 -# Write the uImage to MMC -U-Boot # mmc write 81000000 900 2000 +.. code-block:: text + + # Ensure we are able to talk with this mmc device + U-Boot # mmc rescan + U-Boot # tftp 81000000 am335x/MLO + # Write to two of the backup locations ROM uses + U-Boot # mmc write 81000000 100 100 + U-Boot # mmc write 81000000 200 100 + # Write U-Boot to the location set in the config + U-Boot # tftp 81000000 am335x/u-boot.img + U-Boot # mmc write 81000000 300 400 + # Load kernel and device tree into memory, perform export + U-Boot # tftp 81000000 am335x/uImage + U-Boot # run findfdt + U-Boot # tftp ${fdtaddr} am335x/${fdtfile} + U-Boot # run mmcargs + U-Boot # spl export fdt 81000000 - ${fdtaddr} + # Write the updated device tree to MMC + U-Boot # mmc write ${fdtaddr} 80 80 + # Write the uImage to MMC + U-Boot # mmc write 81000000 900 2000 Falcon Mode: FAT SD cards -========================= +------------------------- In this case the additional file is written to the filesystem. In this example we assume that the uImage and device tree to be used are already on @@ -173,23 +158,31 @@ the FAT filesystem (only the uImage MUST be for this to function afterwards) along with a Falcon Mode aware MLO and the FAT partition has already been created and marked bootable: -U-Boot # mmc rescan -# Load kernel and device tree into memory, perform export -U-Boot # load mmc 0:1 ${loadaddr} uImage -U-Boot # run findfdt -U-Boot # load mmc 0:1 ${fdtaddr} ${fdtfile} -U-Boot # run mmcargs -U-Boot # spl export fdt ${loadaddr} - ${fdtaddr} +.. code-block:: text + + U-Boot # mmc rescan + # Load kernel and device tree into memory, perform export + U-Boot # load mmc 0:1 ${loadaddr} uImage + U-Boot # run findfdt + U-Boot # load mmc 0:1 ${fdtaddr} ${fdtfile} + U-Boot # run mmcargs + U-Boot # spl export fdt ${loadaddr} - ${fdtaddr} This will print a number of lines and then end with something like: - Using Device Tree in place at 80f80000, end 80f85928 - Using Device Tree in place at 80f80000, end 80f88928 + +.. code-block:: text + + Using Device Tree in place at 80f80000, end 80f85928 + Using Device Tree in place at 80f80000, end 80f88928 + So then you: -U-Boot # fatwrite mmc 0:1 0x80f80000 args 8928 +.. code-block:: text + + U-Boot # fatwrite mmc 0:1 0x80f80000 args 8928 Falcon Mode: NAND -================= +----------------- In this case the additional data is written to another partition of the NAND. In this example we assume that the uImage and device tree to be are @@ -197,9 +190,11 @@ already located on the NAND somewhere (such as filesystem or mtd partition) along with a Falcon Mode aware MLO written to the correct locations for booting and mtdparts have been configured correctly for the board: -U-Boot # nand read ${loadaddr} kernel -U-Boot # load nand rootfs ${fdtaddr} /boot/am335x-evm.dtb -U-Boot # run nandargs -U-Boot # spl export fdt ${loadaddr} - ${fdtaddr} -U-Boot # nand erase.part u-boot-spl-os -U-Boot # nand write ${fdtaddr} u-boot-spl-os +.. code-block:: text + + U-Boot # nand read ${loadaddr} kernel + U-Boot # load nand rootfs ${fdtaddr} /boot/am335x-evm.dtb + U-Boot # run nandargs + U-Boot # spl export fdt ${loadaddr} - ${fdtaddr} + U-Boot # nand erase.part u-boot-spl-os + U-Boot # nand write ${fdtaddr} u-boot-spl-os diff --git a/doc/board/ti/index.rst b/doc/board/ti/index.rst index c0da04b109..014a097178 100644 --- a/doc/board/ti/index.rst +++ b/doc/board/ti/index.rst @@ -6,4 +6,5 @@ Texas Instruments .. toctree:: :maxdepth: 2 + am335x_evm j721e_evm diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index bbeec794df..9cacea88d0 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -53,6 +53,14 @@ config TI_EDMA3 This driver support data transfer between memory regions. +config TI_KSNAV + bool "TI Keystone Navigator DMA driver" + depends on ARCH_KEYSTONE + default y + select DMA_LEGACY + help + Enable the Keystone Navigator driver for Keystone 2 platforms. + config APBH_DMA bool "Support APBH DMA" depends on MX23 || MX28 || MX6 || MX7 || IMX8 || IMX8M diff --git a/drivers/dma/keystone_nav.c b/drivers/dma/keystone_nav.c index 443e4b2366..9a5ba79f3f 100644 --- a/drivers/dma/keystone_nav.c +++ b/drivers/dma/keystone_nav.c @@ -11,20 +11,20 @@ #include <linux/delay.h> struct qm_config qm_memmap = { - .stat_cfg = CONFIG_KSNAV_QM_QUEUE_STATUS_BASE, - .queue = (void *)CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE, - .mngr_vbusm = CONFIG_KSNAV_QM_BASE_ADDRESS, - .i_lram = CONFIG_KSNAV_QM_LINK_RAM_BASE, - .proxy = (void *)CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE, - .status_ram = CONFIG_KSNAV_QM_STATUS_RAM_BASE, - .mngr_cfg = (void *)CONFIG_KSNAV_QM_CONF_BASE, - .intd_cfg = CONFIG_KSNAV_QM_INTD_CONF_BASE, - .desc_mem = (void *)CONFIG_KSNAV_QM_DESC_SETUP_BASE, - .region_num = CONFIG_KSNAV_QM_REGION_NUM, - .pdsp_cmd = CONFIG_KSNAV_QM_PDSP1_CMD_BASE, - .pdsp_ctl = CONFIG_KSNAV_QM_PDSP1_CTRL_BASE, - .pdsp_iram = CONFIG_KSNAV_QM_PDSP1_IRAM_BASE, - .qpool_num = CONFIG_KSNAV_QM_QPOOL_NUM, + .stat_cfg = KS2_QM_QUEUE_STATUS_BASE, + .queue = (void *)KS2_QM_MANAGER_QUEUES_BASE, + .mngr_vbusm = KS2_QM_BASE_ADDRESS, + .i_lram = KS2_QM_LINK_RAM_BASE, + .proxy = (void *)KS2_QM_MANAGER_Q_PROXY_BASE, + .status_ram = KS2_QM_STATUS_RAM_BASE, + .mngr_cfg = (void *)KS2_QM_CONF_BASE, + .intd_cfg = KS2_QM_INTD_CONF_BASE, + .desc_mem = (void *)KS2_QM_DESC_SETUP_BASE, + .region_num = KS2_QM_REGION_NUM, + .pdsp_cmd = KS2_QM_PDSP1_CMD_BASE, + .pdsp_ctl = KS2_QM_PDSP1_CTRL_BASE, + .pdsp_iram = KS2_QM_PDSP1_IRAM_BASE, + .qpool_num = KS2_QM_QPOOL_NUM, }; /* @@ -252,7 +252,7 @@ int ksnav_init(struct pktdma_cfg *pktdma, struct rx_buff_desc *rx_buffers) writel(0, &pktdma->global->emulation_control); /* Set QM base address, only for K2x devices */ - writel(CONFIG_KSNAV_QM_BASE_ADDRESS, &pktdma->global->qm_base_addr[0]); + writel(KS2_QM_BASE_ADDRESS, &pktdma->global->qm_base_addr[0]); /* Enable all channels. The current state isn't important */ for (j = 0; j < pktdma->tx_ch_num; j++) { diff --git a/drivers/dma/keystone_nav_cfg.c b/drivers/dma/keystone_nav_cfg.c index 9a64801cf9..301419b6fd 100644 --- a/drivers/dma/keystone_nav_cfg.c +++ b/drivers/dma/keystone_nav_cfg.c @@ -8,19 +8,17 @@ #include <asm/ti-common/keystone_nav.h> -#ifdef CONFIG_KSNAV_PKTDMA_NETCP /* NETCP Pktdma */ struct pktdma_cfg netcp_pktdma = { - .global = (void *)CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE, - .tx_ch = (void *)CONFIG_KSNAV_NETCP_PDMA_TX_BASE, - .tx_ch_num = CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM, - .rx_ch = (void *)CONFIG_KSNAV_NETCP_PDMA_RX_BASE, - .rx_ch_num = CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM, - .tx_sched = (u32 *)CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE, - .rx_flows = (void *)CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE, - .rx_flow_num = CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM, - .rx_free_q = CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE, - .rx_rcv_q = CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE, - .tx_snd_q = CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE, + .global = (void *)KS2_NETCP_PDMA_CTRL_BASE, + .tx_ch = (void *)KS2_NETCP_PDMA_TX_BASE, + .tx_ch_num = KS2_NETCP_PDMA_TX_CH_NUM, + .rx_ch = (void *)KS2_NETCP_PDMA_RX_BASE, + .rx_ch_num = KS2_NETCP_PDMA_RX_CH_NUM, + .tx_sched = (u32 *)KS2_NETCP_PDMA_SCHED_BASE, + .rx_flows = (void *)KS2_NETCP_PDMA_RX_FLOW_BASE, + .rx_flow_num = KS2_NETCP_PDMA_RX_FLOW_NUM, + .rx_free_q = KS2_NETCP_PDMA_RX_FREE_QUEUE, + .rx_rcv_q = KS2_NETCP_PDMA_RX_RCV_QUEUE, + .tx_snd_q = KS2_NETCP_PDMA_TX_SND_QUEUE, }; -#endif diff --git a/drivers/memory/ti-aemif.c b/drivers/memory/ti-aemif.c index 6250e274e1..c4bc88c151 100644 --- a/drivers/memory/ti-aemif.c +++ b/drivers/memory/ti-aemif.c @@ -9,11 +9,10 @@ #include <common.h> #include <asm/ti-common/ti-aemif.h> -#define AEMIF_WAITCYCLE_CONFIG (CONFIG_AEMIF_CNTRL_BASE + 0x4) -#define AEMIF_NAND_CONTROL (CONFIG_AEMIF_CNTRL_BASE + 0x60) -#define AEMIF_ONENAND_CONTROL (CONFIG_AEMIF_CNTRL_BASE + 0x5c) -#define AEMIF_CONFIG(cs) (CONFIG_AEMIF_CNTRL_BASE + 0x10 \ - + (cs * 4)) +#define AEMIF_WAITCYCLE_CONFIG (KS2_AEMIF_CNTRL_BASE + 0x4) +#define AEMIF_NAND_CONTROL (KS2_AEMIF_CNTRL_BASE + 0x60) +#define AEMIF_ONENAND_CONTROL (KS2_AEMIF_CNTRL_BASE + 0x5c) +#define AEMIF_CONFIG(cs) (KS2_AEMIF_CNTRL_BASE + 0x10 + (cs * 4)) #define AEMIF_CFG_SELECT_STROBE(v) ((v) ? 1 << 31 : 0) #define AEMIF_CFG_EXTEND_WAIT(v) ((v) ? 1 << 30 : 0) diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index d267dc6436..820065800f 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -42,7 +42,7 @@ #include <asm/arch/mux_dra7xx.h> #include <asm/arch/dra7xx_iodelay.h> #endif -#if !defined(CONFIG_SOC_KEYSTONE) +#if !defined(CONFIG_ARCH_KEYSTONE) #include <asm/gpio.h> #include <asm/arch/sys_proto.h> #endif @@ -1559,7 +1559,7 @@ int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio, priv->base_addr = (struct hsmmc *)OMAP_HSMMC2_BASE; #if (defined(CONFIG_OMAP44XX) || defined(CONFIG_OMAP54XX) || \ defined(CONFIG_DRA7XX) || defined(CONFIG_AM33XX) || \ - defined(CONFIG_AM43XX) || defined(CONFIG_SOC_KEYSTONE)) && \ + defined(CONFIG_AM43XX) || defined(CONFIG_ARCH_KEYSTONE)) && \ defined(CONFIG_HSMMC2_8BIT) /* Enable 8-bit interface for eMMC on OMAP4/5 or DRA7XX */ host_caps_val |= MMC_MODE_8BIT; diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index f7b1334ddb..bb8cffcabc 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -105,6 +105,10 @@ config NAND_DAVINCI Enable this driver for NAND flash controllers available in TI Davinci and Keystone2 platforms +config KEYSTONE_RBL_NAND + depends on ARCH_KEYSTONE + def_bool y + config NAND_DENALI bool select SYS_NAND_SELF_INIT diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c index 9ad3a57690..ef8e85a002 100644 --- a/drivers/mtd/nand/raw/davinci_nand.c +++ b/drivers/mtd/nand/raw/davinci_nand.c @@ -347,9 +347,9 @@ static struct nand_ecclayout nand_keystone_rbl_4bit_layout_oobfirst = { }; #ifdef CONFIG_SYS_NAND_PAGE_2K -#define CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE >> 11 +#define KEYSTONE_NAND_MAX_RBL_PAGE (0x100000 >> 11) #elif defined(CONFIG_SYS_NAND_PAGE_4K) -#define CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE >> 12 +#define KEYSTONE_NAND_MAX_RBL_PAGE (0x100000 >> 12) #endif /** @@ -371,7 +371,7 @@ static int nand_davinci_write_page(struct mtd_info *mtd, struct nand_chip *chip, struct nand_ecclayout *saved_ecc_layout; /* save current ECC layout and assign Keystone RBL ECC layout */ - if (page < CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE) { + if (page < KEYSTONE_NAND_MAX_RBL_PAGE) { saved_ecc_layout = chip->ecc.layout; chip->ecc.layout = &nand_keystone_rbl_4bit_layout_oobfirst; mtd->oobavail = chip->ecc.layout->oobavail; @@ -402,7 +402,7 @@ static int nand_davinci_write_page(struct mtd_info *mtd, struct nand_chip *chip, err: /* restore ECC layout */ - if (page < CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE) { + if (page < KEYSTONE_NAND_MAX_RBL_PAGE) { chip->ecc.layout = saved_ecc_layout; mtd->oobavail = saved_ecc_layout->oobavail; } @@ -433,7 +433,7 @@ static int nand_davinci_read_page_hwecc(struct mtd_info *mtd, struct nand_chip * struct nand_ecclayout *saved_ecc_layout = chip->ecc.layout; /* save current ECC layout and assign Keystone RBL ECC layout */ - if (page < CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE) { + if (page < KEYSTONE_NAND_MAX_RBL_PAGE) { chip->ecc.layout = &nand_keystone_rbl_4bit_layout_oobfirst; mtd->oobavail = chip->ecc.layout->oobavail; } @@ -463,7 +463,7 @@ static int nand_davinci_read_page_hwecc(struct mtd_info *mtd, struct nand_chip * } /* restore ECC layout */ - if (page < CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE) { + if (page < KEYSTONE_NAND_MAX_RBL_PAGE) { chip->ecc.layout = saved_ecc_layout; mtd->oobavail = saved_ecc_layout->oobavail; } diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 953c2fbe5c..796ff1658c 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -41,7 +41,7 @@ DECLARE_GLOBAL_DATA_PTR; #endif #endif /* !CONFIG_DM_SERIAL */ -#if defined(CONFIG_SOC_KEYSTONE) +#if defined(CONFIG_ARCH_KEYSTONE) #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0 #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0)) #undef UART_MCRVAL @@ -267,7 +267,7 @@ void ns16550_init(struct ns16550 *com_port, int baud_divisor) /* /16 is proper to hit 115200 with 48MHz */ serial_out(0, &com_port->mdr1); #endif -#if defined(CONFIG_SOC_KEYSTONE) +#if defined(CONFIG_ARCH_KEYSTONE) serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC); #endif } diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 8957bb56a6..10b0479a8a 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -57,6 +57,16 @@ config USB_XHCI_OCTEON family SoCs. This is a driver for the dwc3 to provide the glue logic to configure the controller. +config USB_XHCI_OMAP + bool "Support for TI OMAP family xHCI USB controller" + depends on ARCH_OMAP2PLUS + help + Enables support for the on-chip xHCI controller found on some TI SoC + families. Note that some families have multiple contollers while + others only have something such as DesignWare-based controllers. + Consult the SoC documentation to determine if this option applies + to your hardware. + config USB_XHCI_PCI bool "Support for PCI-based xHCI USB controller" depends on DM_USB @@ -173,6 +183,40 @@ config USB_EHCI_OMAP Enables support for the on-chip EHCI controller on OMAP3 and later SoCs. +if USB_EHCI_OMAP + +config HAS_OMAP_EHCI_PHY1_RESET_GPIO + bool "PHY #1 requires a GPIO hold to it in RESET while PHY settles" + help + Enable this to be able to configure the GPIO number used to hold the + PHY in RESET for enough time until the PHY is settled and ready. + +config OMAP_EHCI_PHY1_RESET_GPIO + int "GPIO number to hold PHY #1 in RESET" + depends on HAS_OMAP_EHCI_PHY1_RESET_GPIO + +config HAS_OMAP_EHCI_PHY2_RESET_GPIO + bool "PHY #2 requires a GPIO hold to it in RESET while PHY settles" + help + Enable this to be able to configure the GPIO number used to hold the + PHY in RESET for enough time until the PHY is settled and ready. + +config OMAP_EHCI_PHY2_RESET_GPIO + int "GPIO number to hold PHY #2 in RESET" + depends on HAS_OMAP_EHCI_PHY2_RESET_GPIO + +config HAS_OMAP_EHCI_PHY3_RESET_GPIO + bool "PHY #3 requires a GPIO hold to it in RESET while PHY settles" + help + Enable this to be able to configure the GPIO number used to hold the + PHY in RESET for enough time until the PHY is settled and ready. + +config OMAP_EHCI_PHY3_RESET_GPIO + int "GPIO number to hold PHY #3 in RESET" + depends on HAS_OMAP_EHCI_PHY3_RESET_GPIO + +endif + config USB_EHCI_VF bool "Support for Vybrid on-chip EHCI USB controller" depends on ARCH_VF610 diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c index 12c422d811..d5facf10e1 100644 --- a/drivers/usb/host/ehci-omap.c +++ b/drivers/usb/host/ehci-omap.c @@ -183,17 +183,8 @@ int omap_ehci_hcd_stop(void) * Based on "drivers/usb/host/ehci-omap.c" from Linux 3.1 * See there for additional Copyrights. */ -#if !CONFIG_IS_ENABLED(DM_USB) || !CONFIG_IS_ENABLED(OF_CONTROL) - -int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata, - struct ehci_hccr **hccr, struct ehci_hcor **hcor) -{ - *hccr = (struct ehci_hccr *)(OMAP_EHCI_BASE); - *hcor = (struct ehci_hcor *)(OMAP_EHCI_BASE + 0x10); -#else int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata) { -#endif int ret; unsigned int i, reg = 0, rev = 0; @@ -304,8 +295,6 @@ int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata) return 0; } -#if CONFIG_IS_ENABLED(DM_USB) - static struct omap_usbhs_board_data usbhs_bdata = { .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED, @@ -409,5 +398,3 @@ U_BOOT_DRIVER(usb_omap_ehci) = { .ops = &ehci_usb_ops, .flags = DM_FLAG_ALLOC_PRIV_DMA, }; - -#endif diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig index 8741553d09..c505862f1e 100644 --- a/drivers/usb/phy/Kconfig +++ b/drivers/usb/phy/Kconfig @@ -8,8 +8,5 @@ comment "USB Phy" config TWL4030_USB bool "TWL4030 PHY" -config OMAP_USB_PHY - bool "OMAP PHY" - config ROCKCHIP_USB2_PHY bool "Rockchip USB2 PHY" diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile index 20f7edf48d..b67a70bbe8 100644 --- a/drivers/usb/phy/Makefile +++ b/drivers/usb/phy/Makefile @@ -4,5 +4,4 @@ # Tom Rix <Tom.Rix@windriver.com> obj-$(CONFIG_TWL4030_USB) += twl4030.o -obj-$(CONFIG_OMAP_USB_PHY) += omap_usb_phy.o obj-$(CONFIG_ROCKCHIP_USB2_PHY) += rockchip_usb2_phy.o diff --git a/drivers/usb/phy/omap_usb_phy.c b/drivers/usb/phy/omap_usb_phy.c deleted file mode 100644 index be733f39b2..0000000000 --- a/drivers/usb/phy/omap_usb_phy.c +++ /dev/null @@ -1,267 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * OMAP USB PHY Support - * - * (C) Copyright 2013 - * Texas Instruments, <www.ti.com> - * - * Author: Dan Murphy <dmurphy@ti.com> - */ - -#include <common.h> -#include <usb.h> -#include <dm/device_compat.h> -#include <linux/delay.h> -#include <linux/errno.h> -#include <asm/omap_common.h> -#include <asm/arch/cpu.h> -#include <asm/arch/sys_proto.h> - -#include <linux/compat.h> -#include <linux/usb/dwc3.h> -#include <linux/usb/xhci-omap.h> - -#include <usb/xhci.h> - -#ifdef CONFIG_OMAP_USB3PHY1_HOST -struct usb3_dpll_params { - u16 m; - u8 n; - u8 freq:3; - u8 sd; - u32 mf; -}; - -struct usb3_dpll_map { - unsigned long rate; - struct usb3_dpll_params params; - struct usb3_dpll_map *dpll_map; -}; - -static struct usb3_dpll_map dpll_map_usb[] = { - {12000000, {1250, 5, 4, 20, 0} }, /* 12 MHz */ - {16800000, {3125, 20, 4, 20, 0} }, /* 16.8 MHz */ - {19200000, {1172, 8, 4, 20, 65537} }, /* 19.2 MHz */ - {20000000, {1000, 7, 4, 10, 0} }, /* 20 MHz */ - {26000000, {1250, 12, 4, 20, 0} }, /* 26 MHz */ - {38400000, {3125, 47, 4, 20, 92843} }, /* 38.4 MHz */ - { }, /* Terminator */ -}; - -static struct usb3_dpll_params *omap_usb3_get_dpll_params(void) -{ - unsigned long rate; - struct usb3_dpll_map *dpll_map = dpll_map_usb; - - rate = get_sys_clk_freq(); - - for (; dpll_map->rate; dpll_map++) { - if (rate == dpll_map->rate) - return &dpll_map->params; - } - - dev_err(phy->dev, "No DPLL configuration for %lu Hz SYS CLK\n", rate); - - return NULL; -} - -static void omap_usb_dpll_relock(struct omap_usb3_phy *phy_regs) -{ - u32 val; - - writel(SET_PLL_GO, &phy_regs->pll_go); - do { - val = readl(&phy_regs->pll_status); - if (val & PLL_LOCK) - break; - } while (1); -} - -static void omap_usb_dpll_lock(struct omap_usb3_phy *phy_regs) -{ - struct usb3_dpll_params *dpll_params; - u32 val; - - dpll_params = omap_usb3_get_dpll_params(); - if (!dpll_params) - return; - - val = readl(&phy_regs->pll_config_1); - val &= ~PLL_REGN_MASK; - val |= dpll_params->n << PLL_REGN_SHIFT; - writel(val, &phy_regs->pll_config_1); - - val = readl(&phy_regs->pll_config_2); - val &= ~PLL_SELFREQDCO_MASK; - val |= dpll_params->freq << PLL_SELFREQDCO_SHIFT; - writel(val, &phy_regs->pll_config_2); - - val = readl(&phy_regs->pll_config_1); - val &= ~PLL_REGM_MASK; - val |= dpll_params->m << PLL_REGM_SHIFT; - writel(val, &phy_regs->pll_config_1); - - val = readl(&phy_regs->pll_config_4); - val &= ~PLL_REGM_F_MASK; - val |= dpll_params->mf << PLL_REGM_F_SHIFT; - writel(val, &phy_regs->pll_config_4); - - val = readl(&phy_regs->pll_config_3); - val &= ~PLL_SD_MASK; - val |= dpll_params->sd << PLL_SD_SHIFT; - writel(val, &phy_regs->pll_config_3); - - omap_usb_dpll_relock(phy_regs); -} - -static void usb3_phy_partial_powerup(struct omap_usb3_phy *phy_regs) -{ - u32 rate = get_sys_clk_freq()/1000000; - u32 val; - - val = readl((*ctrl)->control_phy_power_usb); - val &= ~(USB3_PWRCTL_CLK_CMD_MASK | USB3_PWRCTL_CLK_FREQ_MASK); - val |= (USB3_PHY_PARTIAL_RX_POWERON | USB3_PHY_TX_RX_POWERON); - val |= rate << USB3_PWRCTL_CLK_FREQ_SHIFT; - - writel(val, (*ctrl)->control_phy_power_usb); -} - -void usb_phy_power(int on) -{ - u32 val; - - val = readl((*ctrl)->control_phy_power_usb); - if (on) { - val &= ~USB3_PWRCTL_CLK_CMD_MASK; - val |= USB3_PHY_TX_RX_POWERON; - } else { - val &= (~USB3_PWRCTL_CLK_CMD_MASK & ~USB3_PHY_TX_RX_POWERON); - } - - writel(val, (*ctrl)->control_phy_power_usb); -} - -void omap_usb3_phy_init(struct omap_usb3_phy *phy_regs) -{ - omap_usb_dpll_lock(phy_regs); - usb3_phy_partial_powerup(phy_regs); - /* - * Give enough time for the PHY to partially power-up before - * powering it up completely. delay value suggested by the HW - * team. - */ - mdelay(100); -} - -static void omap_enable_usb3_phy(struct omap_xhci *omap) -{ - u32 val; - - val = (USBOTGSS_DMADISABLE | - USBOTGSS_STANDBYMODE_SMRT_WKUP | - USBOTGSS_IDLEMODE_NOIDLE); - writel(val, &omap->otg_wrapper->sysconfig); - - /* Clear the utmi OTG status */ - val = readl(&omap->otg_wrapper->utmi_otg_status); - writel(val, &omap->otg_wrapper->utmi_otg_status); - - /* Enable interrupts */ - writel(USBOTGSS_COREIRQ_EN, &omap->otg_wrapper->irqenable_set_0); - val = (USBOTGSS_IRQ_SET_1_IDPULLUP_FALL_EN | - USBOTGSS_IRQ_SET_1_DISCHRGVBUS_FALL_EN | - USBOTGSS_IRQ_SET_1_CHRGVBUS_FALL_EN | - USBOTGSS_IRQ_SET_1_DRVVBUS_FALL_EN | - USBOTGSS_IRQ_SET_1_IDPULLUP_RISE_EN | - USBOTGSS_IRQ_SET_1_DISCHRGVBUS_RISE_EN | - USBOTGSS_IRQ_SET_1_CHRGVBUS_RISE_EN | - USBOTGSS_IRQ_SET_1_DRVVBUS_RISE_EN | - USBOTGSS_IRQ_SET_1_OEVT_EN); - writel(val, &omap->otg_wrapper->irqenable_set_1); - - /* Clear the IRQ status */ - val = readl(&omap->otg_wrapper->irqstatus_1); - writel(val, &omap->otg_wrapper->irqstatus_1); - val = readl(&omap->otg_wrapper->irqstatus_0); - writel(val, &omap->otg_wrapper->irqstatus_0); -}; -#endif /* CONFIG_OMAP_USB3PHY1_HOST */ - -#ifdef CONFIG_OMAP_USB2PHY2_HOST -static void omap_enable_usb2_phy2(struct omap_xhci *omap) -{ - u32 reg, val; - - val = (~USB2PHY_AUTORESUME_EN & USB2PHY_DISCHGDET); - writel(val, (*ctrl)->control_srcomp_north_side); - - setbits_le32((*prcm)->cm_coreaon_usb_phy2_core_clkctrl, - USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K); - - setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, - (USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K | - OTG_SS_CLKCTRL_MODULEMODE_HW)); - - /* This is an undocumented Reserved register */ - reg = 0x4a0086c0; - val = readl(reg); - val |= 0x100; - setbits_le32(reg, val); -} - -void usb_phy_power(int on) -{ - return; -} -#endif /* CONFIG_OMAP_USB2PHY2_HOST */ - -#ifdef CONFIG_AM437X_USB2PHY2_HOST -static void am437x_enable_usb2_phy2(struct omap_xhci *omap) -{ - const u32 usb_otg_ss_clk_val = (USBOTGSSX_CLKCTRL_MODULE_EN | - USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960); - - writel(usb_otg_ss_clk_val, PRM_PER_USB_OTG_SS0_CLKCTRL); - writel(usb_otg_ss_clk_val, PRM_PER_USB_OTG_SS1_CLKCTRL); - - writel(USBPHYOCPSCP_MODULE_EN, PRM_PER_USBPHYOCP2SCP0_CLKCTRL); - writel(USBPHYOCPSCP_MODULE_EN, PRM_PER_USBPHYOCP2SCP1_CLKCTRL); -} - -void usb_phy_power(int on) -{ - u32 val; - - /* USB1_CTRL */ - val = readl(USB1_CTRL); - if (on) { - /* - * these bits are re-used on AM437x to power up/down the USB - * CM and OTG PHYs, if we don't toggle them, USB will not be - * functional on newer silicon revisions - */ - val &= ~(USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN); - } else { - val |= USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN; - } - - writel(val, USB1_CTRL); -} -#endif /* CONFIG_AM437X_USB2PHY2_HOST */ - -void omap_enable_phy(struct omap_xhci *omap) -{ -#ifdef CONFIG_OMAP_USB2PHY2_HOST - omap_enable_usb2_phy2(omap); -#endif - -#ifdef CONFIG_AM437X_USB2PHY2_HOST - am437x_enable_usb2_phy2(omap); -#endif - -#ifdef CONFIG_OMAP_USB3PHY1_HOST - omap_enable_usb3_phy(omap); - omap_usb3_phy_init(omap->usb3_phy); -#endif -} diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index edfd890767..e54708ccb5 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -14,21 +14,6 @@ #include <configs/ti_omap3_common.h> -/* Hardware drivers */ - -/* - * USB configuration - * Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard - * Enable CONFIG_USB_MUSB_GADGET for Device functionalities. - */ -#ifdef CONFIG_SPL_BUILD -#undef CONFIG_USB_EHCI_OMAP -#else -#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57 -#endif - -/* I2C */ - /* Ethernet */ #define CONFIG_NET_RETRY_COUNT 10 diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index ff1949e7e0..00426597ee 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -54,9 +54,6 @@ #if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD) #define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1 -#define CONFIG_USB_XHCI_OMAP - -#define CONFIG_AM437X_USB2PHY2_HOST #endif #if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_USB_GADGET) diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index 5396586d87..956844414f 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -48,11 +48,6 @@ #define CONFIG_NET_RETRY_COUNT 10 #define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */ -/* USB xHCI HOST */ -#define CONFIG_USB_XHCI_OMAP - -#define CONFIG_OMAP_USB3PHY1_HOST - /* SATA */ #define CONFIG_SCSI_AHCI_PLAT #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 diff --git a/include/configs/cm_t335.h b/include/configs/cm_t335.h index 4ca4f35eb3..38e421ebc4 100644 --- a/include/configs/cm_t335.h +++ b/include/configs/cm_t335.h @@ -10,8 +10,6 @@ #ifndef __CONFIG_CM_T335_H #define __CONFIG_CM_T335_H -#define CONFIG_CM_T335 - #include <configs/ti_am335x_common.h> #undef CONFIG_MAX_RAM_BANK_SIZE diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index a290cf0cbc..6e5c26edc9 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -8,7 +8,6 @@ #ifndef __CONFIG_CM_T43_H #define __CONFIG_CM_T43_H -#define CONFIG_CM_T43 #define CONFIG_MAX_RAM_BANK_SIZE (2048 << 20) /* 2GB */ #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ @@ -45,10 +44,6 @@ /* CPSW Ethernet support */ #define CONFIG_SYS_RX_ETH_BUFFER 64 -/* USB support */ -#define CONFIG_USB_XHCI_OMAP -#define CONFIG_AM437X_USB2PHY2_HOST - /* Power */ #define CONFIG_POWER_TPS65218 diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 46138348a3..361ee9663d 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -74,11 +74,6 @@ /* SPI SPL */ -/* USB xHCI HOST */ -#define CONFIG_USB_XHCI_OMAP - -#define CONFIG_OMAP_USB2PHY2_HOST - /* SATA */ #define CONFIG_SCSI_AHCI_PLAT diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h index 35439c0258..9b25c34982 100644 --- a/include/configs/k2e_evm.h +++ b/include/configs/k2e_evm.h @@ -11,9 +11,6 @@ #include <environment/ti/spi.h> -/* Platform type */ -#define CONFIG_SOC_K2E - #ifdef CONFIG_TI_SECURE_DEVICE #define DEFAULT_SEC_BOOT_ENV \ DEFAULT_FIT_TI_ARGS \ diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index 17245ab158..56dd9c72d9 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -12,9 +12,6 @@ #include <environment/ti/mmc.h> #include <environment/ti/spi.h> -/* Platform type */ -#define CONFIG_SOC_K2G - /* U-Boot general configuration */ #define ENV_KS2_BOARD_SETTINGS \ DEFAULT_MMC_TI_ARGS \ diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h index f5a20ce02b..cfc34c7da6 100644 --- a/include/configs/k2hk_evm.h +++ b/include/configs/k2hk_evm.h @@ -11,9 +11,6 @@ #include <environment/ti/spi.h> -/* Platform type */ -#define CONFIG_SOC_K2HK - #ifdef CONFIG_TI_SECURE_DEVICE #define DEFAULT_SEC_BOOT_ENV \ DEFAULT_FIT_TI_ARGS \ diff --git a/include/configs/k2l_evm.h b/include/configs/k2l_evm.h index 97512c9903..65988fff06 100644 --- a/include/configs/k2l_evm.h +++ b/include/configs/k2l_evm.h @@ -11,9 +11,6 @@ #include <environment/ti/spi.h> -/* Platform type */ -#define CONFIG_SOC_K2L - #ifdef CONFIG_TI_SECURE_DEVICE #define DEFAULT_SEC_BOOT_ENV \ DEFAULT_FIT_TI_ARGS \ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 5d300b13f3..265b1e2197 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -41,9 +41,6 @@ #endif /* CONFIG_SPL_OS_BOOT */ #endif /* CONFIG_MTD_RAW_NAND */ -/* USB EHCI */ -#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147 - /* Enable Multi Bus support for I2C */ #define CONFIG_I2C_MULTI_BUS diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 886f2e9d86..cac35ef079 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -14,23 +14,6 @@ #include <configs/ti_omap3_common.h> -/* - * We are only ever GP parts and will utilize all of the "downloaded image" - * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in - * order to allow for BCH8 to fit in. - */ - -/* Hardware drivers */ - -/* I2C */ - -#ifdef CONFIG_SPL_BUILD -#undef CONFIG_USB_EHCI_OMAP -#endif -#ifdef CONFIG_USB_EHCI_OMAP -#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 4 -#endif - /* Board NAND Info. */ #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h index 14eb363816..69749ab630 100644 --- a/include/configs/omap4_panda.h +++ b/include/configs/omap4_panda.h @@ -11,22 +11,6 @@ #ifndef __CONFIG_PANDA_H #define __CONFIG_PANDA_H -/* - * High Level Configuration Options - */ - -/* USB UHH support options */ -#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 1 -#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 62 - -/* USB Networking options */ - -#define CONFIG_UBOOT_ENABLE_PADS_ALL - #include <configs/ti_omap4_common.h> -/* GPIO */ - -/* ENV related config options */ - #endif /* __CONFIG_PANDA_H */ diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index a1f1dafad7..188ab0bf36 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -43,9 +43,6 @@ /* USB UHH support options */ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET -#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 80 -#define CONFIG_OMAP_EHCI_PHY3_RESET_GPIO 79 - /* Enabled commands */ /* USB Networking options */ diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index f60d15b9db..d20c9e238c 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -17,7 +17,6 @@ /* * SoC Configuration */ -#define CONFIG_MACH_OMAPL138_LCDK #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index 166b8397ad..adbc2ae0c5 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -43,8 +43,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} -/* EHCI */ -#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07 diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 690ef0e144..a6d7b8a073 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -9,8 +9,6 @@ #ifndef __CONFIG_KS2_EVM_H #define __CONFIG_KS2_EVM_H -#define CONFIG_SOC_KEYSTONE - /* U-Boot Build Configuration */ /* SoC Configuration */ @@ -70,37 +68,6 @@ #define CONFIG_SYS_SGMII_LINERATE_MHZ 1250 #define CONFIG_SYS_SGMII_RATESCALE 2 -/* Keyston Navigator Configuration */ -#define CONFIG_TI_KSNAV -#define CONFIG_KSNAV_QM_BASE_ADDRESS KS2_QM_BASE_ADDRESS -#define CONFIG_KSNAV_QM_CONF_BASE KS2_QM_CONF_BASE -#define CONFIG_KSNAV_QM_DESC_SETUP_BASE KS2_QM_DESC_SETUP_BASE -#define CONFIG_KSNAV_QM_STATUS_RAM_BASE KS2_QM_STATUS_RAM_BASE -#define CONFIG_KSNAV_QM_INTD_CONF_BASE KS2_QM_INTD_CONF_BASE -#define CONFIG_KSNAV_QM_PDSP1_CMD_BASE KS2_QM_PDSP1_CMD_BASE -#define CONFIG_KSNAV_QM_PDSP1_CTRL_BASE KS2_QM_PDSP1_CTRL_BASE -#define CONFIG_KSNAV_QM_PDSP1_IRAM_BASE KS2_QM_PDSP1_IRAM_BASE -#define CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE KS2_QM_MANAGER_QUEUES_BASE -#define CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE KS2_QM_MANAGER_Q_PROXY_BASE -#define CONFIG_KSNAV_QM_QUEUE_STATUS_BASE KS2_QM_QUEUE_STATUS_BASE -#define CONFIG_KSNAV_QM_LINK_RAM_BASE KS2_QM_LINK_RAM_BASE -#define CONFIG_KSNAV_QM_REGION_NUM KS2_QM_REGION_NUM -#define CONFIG_KSNAV_QM_QPOOL_NUM KS2_QM_QPOOL_NUM - -/* NETCP pktdma */ -#define CONFIG_KSNAV_PKTDMA_NETCP -#define CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE KS2_NETCP_PDMA_CTRL_BASE -#define CONFIG_KSNAV_NETCP_PDMA_TX_BASE KS2_NETCP_PDMA_TX_BASE -#define CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM KS2_NETCP_PDMA_TX_CH_NUM -#define CONFIG_KSNAV_NETCP_PDMA_RX_BASE KS2_NETCP_PDMA_RX_BASE -#define CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM KS2_NETCP_PDMA_RX_CH_NUM -#define CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE KS2_NETCP_PDMA_SCHED_BASE -#define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE KS2_NETCP_PDMA_RX_FLOW_BASE -#define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM KS2_NETCP_PDMA_RX_FLOW_NUM -#define CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE KS2_NETCP_PDMA_RX_FREE_QUEUE -#define CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE KS2_NETCP_PDMA_RX_RCV_QUEUE -#define CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE KS2_NETCP_PDMA_TX_SND_QUEUE - /* Keystone net */ #define CONFIG_KSNET_MAC_ID_BASE KS2_MAC_ID_BASE_ADDR #define CONFIG_KSNET_NETCP_BASE KS2_NETCP_BASE @@ -108,8 +75,6 @@ #define CONFIG_KSNET_SERDES_SGMII2_BASE KS2_SGMII_SERDES2_BASE #define CONFIG_KSNET_SERDES_LANES_PER_SGMII KS2_LANES_PER_SGMII_SERDES -#define CONFIG_AEMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE - /* I2C Configuration */ #define CONFIG_SYS_DAVINCI_I2C_SPEED 100000 #define CONFIG_SYS_DAVINCI_I2C_SLAVE 0x10 /* SMBus host address */ @@ -121,8 +86,6 @@ /* EEPROM definitions */ /* NAND Configuration */ -#define CONFIG_KEYSTONE_RBL_NAND -#define CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE CONFIG_ENV_OFFSET #define CONFIG_SYS_NAND_MASK_CLE 0x4000 #define CONFIG_SYS_NAND_MASK_ALE 0x2000 #define CONFIG_SYS_NAND_CS 2 |