diff options
author | Kunihiko Hayashi <hayashi.kunihiko@socionext.com> | 2021-07-06 13:01:11 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2021-07-14 23:48:10 +0300 |
commit | 9e9074bcdd52e0e898c668eaac9555504370cc92 (patch) | |
tree | 74ce155109502d4b0c8ef76666448a1b5d2639ce | |
parent | bc9255a5adcbd51db45b102cf9a6b592ff0fdbff (diff) | |
download | u-boot-9e9074bcdd52e0e898c668eaac9555504370cc92.tar.xz |
ARM: dts: uniphier: Add support for Akebi96
Add the device tree for Akebi96. Akebi96 is a 96boards certified
development board based on UniPhier LD20.
( https://www.96boards.org/product/akebi96/ )
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
-rw-r--r-- | arch/arm/dts/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/dts/uniphier-ld20-akebi96.dts | 189 |
2 files changed, 190 insertions, 0 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 7ce3ae6caa..708ce2d094 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -254,6 +254,7 @@ dtb-$(CONFIG_ARCH_UNIPHIER_LD11) += \ uniphier-ld11-global.dtb \ uniphier-ld11-ref.dtb dtb-$(CONFIG_ARCH_UNIPHIER_LD20) += \ + uniphier-ld20-akebi96.dtb \ uniphier-ld20-global.dtb \ uniphier-ld20-ref.dtb dtb-$(CONFIG_ARCH_UNIPHIER_LD4) += \ diff --git a/arch/arm/dts/uniphier-ld20-akebi96.dts b/arch/arm/dts/uniphier-ld20-akebi96.dts new file mode 100644 index 0000000000..aa159a1129 --- /dev/null +++ b/arch/arm/dts/uniphier-ld20-akebi96.dts @@ -0,0 +1,189 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +// +// Device Tree Source for Akebi96 Development Board +// +// Derived from uniphier-ld20-global.dts. +// +// Copyright (C) 2015-2017 Socionext Inc. +// Copyright (C) 2019-2020 Linaro Ltd. + +/dts-v1/; +#include <dt-bindings/gpio/uniphier-gpio.h> +#include "uniphier-ld20.dtsi" + +/ { + model = "Akebi96"; + compatible = "socionext,uniphier-ld20-akebi96", + "socionext,uniphier-ld20"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + serial3 = &serial3; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + spi0 = &spi0; + spi1 = &spi1; + spi2 = &spi2; + spi3 = &spi3; + ethernet0 = ð + }; + + memory@80000000 { + device_type = "memory"; + reg = <0 0x80000000 0 0xc0000000>; + }; + + framebuffer@c0000000 { + compatible = "simple-framebuffer"; + reg = <0 0xc0000000 0 0x02000000>; + width = <1920>; + height = <1080>; + stride = <7680>; + format = "a8r8g8b8"; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + memory@c0000000 { + reg = <0 0xc0000000 0 0x02000000>; + no-map; + }; + }; + + sound { + compatible = "audio-graph-card"; + label = "UniPhier LD20"; + dais = <&spdif_port0 + &comp_spdif_port0>; + }; + + spdif-out { + compatible = "linux,spdif-dit"; + #sound-dai-cells = <0>; + + port@0 { + spdif_tx: endpoint { + remote-endpoint = <&spdif_hiecout1>; + }; + }; + }; + + comp-spdif-out { + compatible = "linux,spdif-dit"; + #sound-dai-cells = <0>; + + port@0 { + comp_spdif_tx: endpoint { + remote-endpoint = <&comp_spdif_hiecout1>; + }; + }; + }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; +}; + +&spi3 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + usb-over-spi@0 { + compatible = "maxim,max3421-udc"; + reg = <0>; + spi-max-frequency = <12500000>; + interrupt-parent = <&gpio>; + interrupt-names = "udc"; + interrupts = <0 2>; + }; +}; + +&serial0 { + /* Onboard USB-UART */ + status = "okay"; +}; + +&serial2 { + /* LS connector UART1 */ + status = "okay"; +}; + +&serial3 { + /* LS connector UART0 */ + status = "okay"; +}; + +&spdif_hiecout1 { + remote-endpoint = <&spdif_tx>; +}; + +&comp_spdif_hiecout1 { + remote-endpoint = <&comp_spdif_tx>; +}; + +&i2c0 { + /* LS connector I2C0 */ + status = "okay"; +}; + +&i2c1 { + /* LS connector I2C1 */ + status = "okay"; +}; + +ð { + status = "okay"; + phy-handle = <ðphy>; +}; + +&mdio { + ethphy: ethernet-phy@0 { + reg = <0>; + }; +}; + +&usb { + status = "okay"; +}; + +&pcie { + status = "okay"; +}; + +&gpio { + /* IRQs for Max3421 */ + xirq0 { + gpio-hog; + gpios = <UNIPHIER_GPIO_IRQ(0) 1>; + input; + }; + xirq10 { + gpio-hog; + gpios = <UNIPHIER_GPIO_IRQ(10) 1>; + input; + }; +}; + +&pinctrl_aout1 { + groups = "aout1b"; +}; + +&pinctrl_uart3 { + groups = "uart3", "uart3_ctsrts"; +}; |