diff options
author | Bin Meng <bmeng.cn@gmail.com> | 2016-02-01 12:40:43 +0300 |
---|---|---|
committer | Bin Meng <bmeng.cn@gmail.com> | 2016-02-05 07:47:21 +0300 |
commit | 384980c687ca38c028bdf40f59a38b3f52105884 (patch) | |
tree | e9f70955a43852369d64b01eafb91c09e6b4e848 | |
parent | 3e389d8ba666c5c2ad42021c2087630c1e412954 (diff) | |
download | u-boot-384980c687ca38c028bdf40f59a38b3f52105884.tar.xz |
dm: pch: Add get_gpio_base op
x86 GPIO registers are accessed via I/O port whose base address is
configured in a PCI configuration register on the PCH device. Add
an op get_gpio_base to get the GPIO base address from PCH.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
-rw-r--r-- | drivers/pch/pch-uclass.c | 11 | ||||
-rw-r--r-- | include/pch.h | 18 |
2 files changed, 29 insertions, 0 deletions
diff --git a/drivers/pch/pch-uclass.c b/drivers/pch/pch-uclass.c index b33d50201b..48a3965a76 100644 --- a/drivers/pch/pch-uclass.c +++ b/drivers/pch/pch-uclass.c @@ -33,6 +33,17 @@ int pch_set_spi_protect(struct udevice *dev, bool protect) return ops->set_spi_protect(dev, protect); } +int pch_get_gpio_base(struct udevice *dev, u32 *gbasep) +{ + struct pch_ops *ops = pch_get_ops(dev); + + *gbasep = 0; + if (!ops->get_gpio_base) + return -ENOSYS; + + return ops->get_gpio_base(dev, gbasep); +} + static int pch_uclass_post_bind(struct udevice *bus) { /* diff --git a/include/pch.h b/include/pch.h index c04cfa32bc..b378865c67 100644 --- a/include/pch.h +++ b/include/pch.h @@ -32,6 +32,15 @@ struct pch_ops { * @return 0 on success, -ENOSYS if not implemented */ int (*set_spi_protect)(struct udevice *dev, bool protect); + + /** + * get_gpio_base() - get the address of GPIO base + * + * @dev: PCH device to check + * @gbasep: Returns address of GPIO base if available, else 0 + * @return 0 if OK, -ve on error (e.g. there is no GPIO base) + */ + int (*get_gpio_base)(struct udevice *dev, u32 *gbasep); }; #define pch_get_ops(dev) ((struct pch_ops *)(dev)->driver->ops) @@ -55,4 +64,13 @@ int pch_get_spi_base(struct udevice *dev, ulong *sbasep); */ int pch_set_spi_protect(struct udevice *dev, bool protect); +/** + * pch_get_gpio_base() - get the address of GPIO base + * + * @dev: PCH device to check + * @gbasep: Returns address of GPIO base if available, else 0 + * @return 0 if OK, -ve on error (e.g. there is no GPIO base) + */ +int pch_get_gpio_base(struct udevice *dev, u32 *gbasep); + #endif |