net: freescale: replace usage of phy-mode = "sgmii-2500" with "2500base-x"

After the discussion here:
https://lore.kernel.org/netdev/20210603143453.if7hgifupx5k433b@pali/

which resulted in this patch:
https://patchwork.kernel.org/project/netdevbpf/patch/20210704134325.24842-1-pali@kernel.org/

and many other discussions before it, notably:
https://patchwork.kernel.org/project/linux-arm-kernel/patch/1512016235-15909-1-git-send-email-Bhaskar.Upadhaya@nxp.com/

it became apparent that nobody really knows what "SGMII 2500" is.
Certainly, Freescale/NXP hardware engineers name this protocol
"SGMII 2500" in the reference manuals, but the PCS devices do not
support any "SGMII" specific features when operating at the speed of
2500 Mbps, no in-band autoneg and no speed change via symbol replication
. So that leaves a fixed speed of 2500 Mbps using a coding of 8b/10b
with a SERDES lane frequency of 3.125 GHz. In fact, "SGMII 2500 without
in-band autoneg and at a fixed speed" is indistinguishable from
"2500base-x without in-band autoneg", which is precisely what these NXP
devices support.

So it just appears that "SGMII 2500" is an unclear name with no clear
definition that stuck.

As such, in the Linux kernel, the drivers which use this SERDES protocol
use the 2500base-x phy-mode.

This patch converts U-Boot to use 2500base-x too, or at least, as much
as it can.

Note that I would have really liked to delete PHY_INTERFACE_MODE_SGMII_2500
completely, but the mvpp2 driver seems to even distinguish between SGMII
2500 and 2500base-X. Namely, it enables in-band autoneg for one but not
the other, and forces flow control for one but not the other. This goes
back to the idea that maybe 2500base-X is a fiber protocol and SGMII-2500
is an MII protocol (connects a MAC to a PHY such as Aquantia), but the
two are practically indistinguishable through everything except use case.

NXP devices can support both use cases through an identical configuration,
for example RX flow control can be unconditionally enabled in order to
support rate adaptation performed by an Aquantia PHY. At least I can
find no indication in online documents published by Cisco which would
point towards "SGMII-2500" being an actual standard with an actual
definition, so I cannot say "yes, NXP devices support it".

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>

23 files changed, 45 insertions, 45 deletions

diff --git a/arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi b/arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi
index 6dcd15a685..548ab2ba65 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi
@@ -14,6 +14,6 @@
 
 &enetc0 {
 	status = "okay";
-	phy-mode = "sgmii-2500";
+	phy-mode = "2500base-x";
 	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
 };
diff --git a/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi b/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi
index 1607a32c1e..3991fb793f 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi
@@ -30,25 +30,25 @@
 
 &mscc_felix_port0 {
 	status = "okay";
-	phy-mode = "sgmii-2500";
+	phy-mode = "2500base-x";
 	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@00}>;
 };
 
 &mscc_felix_port1 {
 	status = "okay";
-	phy-mode = "sgmii-2500";
+	phy-mode = "2500base-x";
 	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@01}>;
 };
 
 &mscc_felix_port2 {
 	status = "okay";
-	phy-mode = "sgmii-2500";
+	phy-mode = "2500base-x";
 	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
 };
 
 &mscc_felix_port3 {
 	status = "okay";
-	phy-mode = "sgmii-2500";
+	phy-mode = "2500base-x";
 	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@03}>;
 };
 
diff --git a/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi b/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi
index a00f58273d..d68c8c2be0 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi
@@ -19,13 +19,13 @@
 
 &mscc_felix_port0 {
 	status = "okay";
-	phy-mode = "sgmii-2500";
+	phy-mode = "2500base-x";
 	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
 };
 
 &mscc_felix_port3 {
 	status = "okay";
-	phy-mode = "sgmii-2500";
+	phy-mode = "2500base-x";
 	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@03}>;
 };
 
diff --git a/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi b/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi
index 16a96c1fd5..7f785507bf 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi
@@ -19,7 +19,7 @@
 
 &mscc_felix_port1 {
 	status = "okay";
-	phy-mode = "sgmii-2500";
+	phy-mode = "2500base-x";
 	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@02}>;
 };
 
diff --git a/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi b/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi
index 0db9b70f21..0fbe7721c8 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi
@@ -19,7 +19,7 @@
 
 &mscc_felix_port2 {
 	status = "okay";
-	phy-mode = "sgmii-2500";
+	phy-mode = "2500base-x";
 	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@60/phy@02}>;
 };
 
diff --git a/arch/arm/dts/fsl-sch-30841.dtsi b/arch/arm/dts/fsl-sch-30841.dtsi
index 3aa7fddc32..28b1bec18a 100644
--- a/arch/arm/dts/fsl-sch-30841.dtsi
+++ b/arch/arm/dts/fsl-sch-30841.dtsi
@@ -9,7 +9,7 @@
  * SCH-30841 is a 4 port add-on card used with various FSL QDS boards.
  * It integrates a AQR412C quad PHY which supports 4 interfaces either muxed
  * together on a single lane or mapped 1:1 to serdes lanes.
- * It supports several protocols - SGMII, SGMII-2500, USXGMII, M-USX, 10GBase-R.
+ * It supports several protocols - SGMII, 2500base-X, USXGMII, M-USX, 10GBase-R.
  * PHY addresses are 0x00 - 0x03.
  * On the card the first port is the bottom port (closest to PEX connector).
  */
diff --git a/arch/arm/dts/fsl-sch-30842.dtsi b/arch/arm/dts/fsl-sch-30842.dtsi
index b3c0c2bc35..bff9e76570 100644
--- a/arch/arm/dts/fsl-sch-30842.dtsi
+++ b/arch/arm/dts/fsl-sch-30842.dtsi
@@ -8,7 +8,7 @@
 /*
  * SCH-30842 is a single port add-on card used with various FSL QDS boards.
  * It integrates a AQR112 PHY, which supports several protocols - SGMII,
- * SGMII-2500, USXGMII, 10GBase-R.
+ * 2500base-x, USXGMII, 10GBase-R.
  * PHY address is 0x02.
  */
 phy@02 {
diff --git a/board/freescale/ls1012aqds/eth.c b/board/freescale/ls1012aqds/eth.c
index 8189f41bec..27f69abf60 100644
--- a/board/freescale/ls1012aqds/eth.c
+++ b/board/freescale/ls1012aqds/eth.c
@@ -244,7 +244,7 @@ int pfe_eth_board_init(struct udevice *dev)
 		bus = miiphy_get_dev_by_name(mdio_name);
 		pfe_set_mdio(1, bus);
 		pfe_set_phy_address_mode(1, CONFIG_PFE_SGMII_2500_PHY2_ADDR,
-					 PHY_INTERFACE_MODE_SGMII_2500);
+					 PHY_INTERFACE_MODE_2500BASEX);
 
 		data8 = QIXIS_READ(brdcfg[12]);
 		data8 |= 0x20;
@@ -263,7 +263,7 @@ int pfe_eth_board_init(struct udevice *dev)
 		pfe_set_mdio(0, bus);
 		pfe_set_phy_address_mode(0,
 					 CONFIG_PFE_SGMII_2500_PHY1_ADDR,
-					 PHY_INTERFACE_MODE_SGMII_2500);
+					 PHY_INTERFACE_MODE_2500BASEX);
 	}
 		break;
 
diff --git a/board/freescale/ls1012aqds/ls1012aqds.c b/board/freescale/ls1012aqds/ls1012aqds.c
index 33a0910a19..6e21040601 100644
--- a/board/freescale/ls1012aqds/ls1012aqds.c
+++ b/board/freescale/ls1012aqds/ls1012aqds.c
@@ -265,7 +265,7 @@ static void fdt_fsl_fixup_of_pfe(void *blob)
 						ETH_1_2_5G_MDIO_MUX);
 				prop_val.phy_mask = cpu_to_fdt32(
 						ETH_2_5G_MDIO_PHY_MASK);
-				prop_val.phy_mode = "sgmii-2500";
+				prop_val.phy_mode = "2500base-x";
 				pfe_set_properties(l_blob, prop_val, ETH_1_PATH,
 						   ETH_1_MDIO);
 			} else {
@@ -277,7 +277,7 @@ static void fdt_fsl_fixup_of_pfe(void *blob)
 						ETH_2_2_5G_MDIO_MUX);
 				prop_val.phy_mask = cpu_to_fdt32(
 						ETH_2_5G_MDIO_PHY_MASK);
-				prop_val.phy_mode = "sgmii-2500";
+				prop_val.phy_mode = "2500base-x";
 				pfe_set_properties(l_blob, prop_val, ETH_2_PATH,
 						   ETH_2_MDIO);
 			}
diff --git a/board/freescale/ls1012aqds/ls1012aqds_pfe.h b/board/freescale/ls1012aqds/ls1012aqds_pfe.h
index 05ccb71aa0..5ab283ce8d 100644
--- a/board/freescale/ls1012aqds/ls1012aqds_pfe.h
+++ b/board/freescale/ls1012aqds/ls1012aqds_pfe.h
@@ -17,7 +17,7 @@
 #define ETH_1_2_5G_PHY_ID	0x1
 #define ETH_1_2_5G_MDIO_MUX	0x2
 #define ETH_2_5G_MDIO_PHY_MASK	0xFFFFFFF9
-#define ETH_2_5G_PHY_MODE	"sgmii-2500"
+#define ETH_2_5G_PHY_MODE	"2500base-x"
 #define ETH_2_2_5G_BUS_ID	0x1
 #define ETH_2_2_5G_PHY_ID	0x2
 #define ETH_2_2_5G_MDIO_MUX	0x3
diff --git a/board/freescale/ls1012ardb/eth.c b/board/freescale/ls1012ardb/eth.c
index bb3fbc71ef..565f800596 100644
--- a/board/freescale/ls1012ardb/eth.c
+++ b/board/freescale/ls1012ardb/eth.c
@@ -121,12 +121,12 @@ int pfe_eth_board_init(struct udevice *dev)
 			/* MAC1 */
 			pfe_set_phy_address_mode(priv->gemac_port,
 						 CONFIG_PFE_EMAC1_PHY_ADDR,
-						 PHY_INTERFACE_MODE_SGMII_2500);
+						 PHY_INTERFACE_MODE_2500BASEX);
 		} else {
 			/* MAC2 */
 			pfe_set_phy_address_mode(priv->gemac_port,
 						 CONFIG_PFE_EMAC2_PHY_ADDR,
-						 PHY_INTERFACE_MODE_SGMII_2500);
+						 PHY_INTERFACE_MODE_2500BASEX);
 		}
 		break;
 	default:
diff --git a/board/freescale/ls1043aqds/eth.c b/board/freescale/ls1043aqds/eth.c
index 81e18f6e82..e156ba0104 100644
--- a/board/freescale/ls1043aqds/eth.c
+++ b/board/freescale/ls1043aqds/eth.c
@@ -176,7 +176,7 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
 					   "sgmii-riser-s4-p1");
 		}
 	} else if (fm_info_get_enet_if(port) ==
-		   PHY_INTERFACE_MODE_SGMII_2500) {
+		   PHY_INTERFACE_MODE_2500BASEX) {
 		/* 2.5G SGMII interface */
 		f_link.phy_id = cpu_to_fdt32(port);
 		f_link.duplex = cpu_to_fdt32(1);
@@ -187,7 +187,7 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
 		fdt_delprop(fdt, offset, "phy-handle");
 		fdt_setprop(fdt, offset, "fixed-link", &f_link, sizeof(f_link));
 		fdt_setprop_string(fdt, offset, "phy-connection-type",
-				   "sgmii-2500");
+				   "2500base-x");
 	} else if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_QSGMII) {
 		switch (mdio_mux[port]) {
 		case EMI1_SLOT1:
@@ -430,12 +430,12 @@ int board_eth_init(struct bd_info *bis)
 		interface = fm_info_get_enet_if(i);
 		switch (interface) {
 		case PHY_INTERFACE_MODE_SGMII:
-		case PHY_INTERFACE_MODE_SGMII_2500:
+		case PHY_INTERFACE_MODE_2500BASEX:
 		case PHY_INTERFACE_MODE_QSGMII:
 			if (interface == PHY_INTERFACE_MODE_SGMII) {
 				lane = serdes_get_first_lane(FSL_SRDS_1,
 						SGMII_FM1_DTSEC1 + idx);
-			} else if (interface == PHY_INTERFACE_MODE_SGMII_2500) {
+			} else if (interface == PHY_INTERFACE_MODE_2500BASEX) {
 				lane = serdes_get_first_lane(FSL_SRDS_1,
 						SGMII_2500_FM1_DTSEC1 + idx);
 			} else {
diff --git a/board/freescale/ls1046aqds/eth.c b/board/freescale/ls1046aqds/eth.c
index 2352832466..8233f5461e 100644
--- a/board/freescale/ls1046aqds/eth.c
+++ b/board/freescale/ls1046aqds/eth.c
@@ -178,7 +178,7 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
 		default:
 			break;
 		}
-	} else if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII_2500) {
+	} else if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_2500BASEX) {
 		/* 2.5G SGMII interface */
 		f_link.phy_id = cpu_to_fdt32(port);
 		f_link.duplex = cpu_to_fdt32(1);
@@ -189,7 +189,7 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
 		fdt_delprop(fdt, offset, "phy-handle");
 		fdt_setprop(fdt, offset, "fixed-link", &f_link, sizeof(f_link));
 		fdt_setprop_string(fdt, offset, "phy-connection-type",
-				   "sgmii-2500");
+				   "2500base-x");
 	} else if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_QSGMII) {
 		switch (port) {
 		case FM1_DTSEC1:
diff --git a/board/freescale/t102xrdb/eth_t102xrdb.c b/board/freescale/t102xrdb/eth_t102xrdb.c
index b28c5457d6..4f04d2ee06 100644
--- a/board/freescale/t102xrdb/eth_t102xrdb.c
+++ b/board/freescale/t102xrdb/eth_t102xrdb.c
@@ -103,7 +103,7 @@ int board_eth_init(struct bd_info *bis)
 #endif
 			fm_info_set_mdio(i, dev);
 			break;
-		case PHY_INTERFACE_MODE_SGMII_2500:
+		case PHY_INTERFACE_MODE_2500BASEX:
 			dev = miiphy_get_dev_by_name(DEFAULT_FM_TGEC_MDIO_NAME);
 			fm_info_set_mdio(i, dev);
 			break;
@@ -133,12 +133,12 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
 			      enum fm_port port, int offset)
 {
 #if defined(CONFIG_TARGET_T1024RDB)
-	if (((fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII_2500) ||
+	if (((fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_2500BASEX) ||
 	     (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII)) &&
 			(port == FM1_DTSEC3)) {
 		fdt_set_phy_handle(fdt, compat, addr, "sg_2500_aqr105_phy4");
 		fdt_setprop_string(fdt, offset, "phy-connection-type",
-				   "sgmii-2500");
+				   "2500base-x");
 		fdt_status_disabled_by_alias(fdt, "xg_aqr105_phy3");
 	}
 #endif
diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c
index 7c23ccc1f0..5e0d0bca9b 100644
--- a/drivers/net/fm/eth.c
+++ b/drivers/net/fm/eth.c
@@ -50,7 +50,7 @@ static void dtsec_configure_serdes(struct fm_eth *priv)
 	u32 value;
 	struct mii_dev bus;
 	bool sgmii_2500 = (priv->enet_if ==
-			PHY_INTERFACE_MODE_SGMII_2500) ? true : false;
+			PHY_INTERFACE_MODE_2500BASEX) ? true : false;
 	int i = 0, j;
 
 #ifndef CONFIG_DM_ETH
@@ -133,7 +133,7 @@ static void dtsec_init_phy(struct fm_eth *fm_eth)
 
 	if (fm_eth->enet_if == PHY_INTERFACE_MODE_SGMII ||
 	    fm_eth->enet_if == PHY_INTERFACE_MODE_QSGMII ||
-	    fm_eth->enet_if == PHY_INTERFACE_MODE_SGMII_2500)
+	    fm_eth->enet_if == PHY_INTERFACE_MODE_2500BASEX)
 		dtsec_configure_serdes(fm_eth);
 }
 
@@ -432,7 +432,7 @@ static int fm_eth_startup(struct fm_eth *fm_eth)
 
 	/* For some reason we need to set SPEED_100 */
 	if (((fm_eth->enet_if == PHY_INTERFACE_MODE_SGMII) ||
-	     (fm_eth->enet_if == PHY_INTERFACE_MODE_SGMII_2500) ||
+	     (fm_eth->enet_if == PHY_INTERFACE_MODE_2500BASEX) ||
 	     (fm_eth->enet_if == PHY_INTERFACE_MODE_QSGMII)) &&
 	      mac->set_if_mode)
 		mac->set_if_mode(mac, fm_eth->enet_if, SPEED_100);
@@ -829,7 +829,7 @@ static int init_phy(struct fm_eth *fm_eth)
 
 	if (fm_eth->type == FM_ETH_10G_E)
 		supported = PHY_10G_FEATURES;
-	if (fm_eth->enet_if == PHY_INTERFACE_MODE_SGMII_2500)
+	if (fm_eth->enet_if == PHY_INTERFACE_MODE_2500BASEX)
 		supported |= SUPPORTED_2500baseX_Full;
 #endif
 
@@ -1090,7 +1090,7 @@ static int fm_eth_probe(struct udevice *dev)
 		if (fm_eth->num != 0)
 			break;
 	case PHY_INTERFACE_MODE_SGMII:
-	case PHY_INTERFACE_MODE_SGMII_2500:
+	case PHY_INTERFACE_MODE_2500BASEX:
 		fm_eth->pcs_mdio = fm_get_internal_mdio(dev);
 		break;
 	default:
diff --git a/drivers/net/fm/ls1043.c b/drivers/net/fm/ls1043.c
index ba4da69423..e1abf8f6bb 100644
--- a/drivers/net/fm/ls1043.c
+++ b/drivers/net/fm/ls1043.c
@@ -79,7 +79,7 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
 	case FM1_DTSEC2:
 		if ((port == FM1_DTSEC2) &&
 		    is_serdes_configured(SGMII_2500_FM1_DTSEC2))
-			return PHY_INTERFACE_MODE_SGMII_2500;
+			return PHY_INTERFACE_MODE_2500BASEX;
 	case FM1_DTSEC5:
 	case FM1_DTSEC6:
 	case FM1_DTSEC9:
@@ -87,7 +87,7 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
 			return PHY_INTERFACE_MODE_SGMII;
 		else if ((port == FM1_DTSEC9) &&
 			 is_serdes_configured(SGMII_2500_FM1_DTSEC9))
-			return PHY_INTERFACE_MODE_SGMII_2500;
+			return PHY_INTERFACE_MODE_2500BASEX;
 		break;
 	default:
 		break;
diff --git a/drivers/net/fm/ls1046.c b/drivers/net/fm/ls1046.c
index 49b540bd30..09df0aa537 100644
--- a/drivers/net/fm/ls1046.c
+++ b/drivers/net/fm/ls1046.c
@@ -99,7 +99,7 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
 	case FM1_DTSEC10:
 		if (is_serdes_configured(SGMII_2500_FM1_DTSEC5 +
 					 port - FM1_DTSEC5))
-			return PHY_INTERFACE_MODE_SGMII_2500;
+			return PHY_INTERFACE_MODE_2500BASEX;
 		break;
 	default:
 		break;
diff --git a/drivers/net/fm/memac.c b/drivers/net/fm/memac.c
index e1f812b688..eeb67a39a7 100644
--- a/drivers/net/fm/memac.c
+++ b/drivers/net/fm/memac.c
@@ -93,7 +93,7 @@ static void memac_set_interface_mode(struct fsl_enet_mac *mac,
 		if_mode |= (IF_MODE_GMII | IF_MODE_RM);
 		break;
 	case PHY_INTERFACE_MODE_SGMII:
-	case PHY_INTERFACE_MODE_SGMII_2500:
+	case PHY_INTERFACE_MODE_2500BASEX:
 	case PHY_INTERFACE_MODE_QSGMII:
 		if_mode &= ~IF_MODE_MASK;
 		if_mode |= (IF_MODE_GMII);
diff --git a/drivers/net/fm/t1024.c b/drivers/net/fm/t1024.c
index 6fc3b90337..696e74c9e6 100644
--- a/drivers/net/fm/t1024.c
+++ b/drivers/net/fm/t1024.c
@@ -63,7 +63,7 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
 			return PHY_INTERFACE_MODE_SGMII;
 		else if (is_serdes_configured(SGMII_2500_FM1_DTSEC1
 			 + port - FM1_DTSEC1))
-			return PHY_INTERFACE_MODE_SGMII_2500;
+			return PHY_INTERFACE_MODE_2500BASEX;
 		break;
 	default:
 		break;
diff --git a/drivers/net/fsl_enetc.c b/drivers/net/fsl_enetc.c
index 12d9942b65..045527dcf7 100644
--- a/drivers/net/fsl_enetc.c
+++ b/drivers/net/fsl_enetc.c
@@ -144,7 +144,7 @@ static int enetc_init_sgmii(struct udevice *dev)
 	if (!enetc_has_imdio(dev))
 		return 0;
 
-	if (priv->if_type == PHY_INTERFACE_MODE_SGMII_2500)
+	if (priv->if_type == PHY_INTERFACE_MODE_2500BASEX)
 		is2500 = true;
 
 	/*
@@ -291,7 +291,7 @@ static void enetc_start_pcs(struct udevice *dev)
 
 	switch (priv->if_type) {
 	case PHY_INTERFACE_MODE_SGMII:
-	case PHY_INTERFACE_MODE_SGMII_2500:
+	case PHY_INTERFACE_MODE_2500BASEX:
 		enetc_init_sgmii(dev);
 		break;
 	case PHY_INTERFACE_MODE_XGMII:
diff --git a/drivers/net/mscc_eswitch/felix_switch.c b/drivers/net/mscc_eswitch/felix_switch.c
index 1413084595..6a689ee3c5 100644
--- a/drivers/net/mscc_eswitch/felix_switch.c
+++ b/drivers/net/mscc_eswitch/felix_switch.c
@@ -213,12 +213,12 @@ static void felix_start_pcs(struct udevice *dev, int port,
 	bool autoneg = true;
 
 	if (phy->phy_id == PHY_FIXED_ID ||
-	    phy->interface == PHY_INTERFACE_MODE_SGMII_2500)
+	    phy->interface == PHY_INTERFACE_MODE_2500BASEX)
 		autoneg = false;
 
 	switch (phy->interface) {
 	case PHY_INTERFACE_MODE_SGMII:
-	case PHY_INTERFACE_MODE_SGMII_2500:
+	case PHY_INTERFACE_MODE_2500BASEX:
 	case PHY_INTERFACE_MODE_QSGMII:
 		felix_init_sgmii(imdio, port, autoneg);
 		break;
diff --git a/drivers/net/pfe_eth/pfe_mdio.c b/drivers/net/pfe_eth/pfe_mdio.c
index 3228b8df49..ae5b6fc280 100644
--- a/drivers/net/pfe_eth/pfe_mdio.c
+++ b/drivers/net/pfe_eth/pfe_mdio.c
@@ -161,7 +161,7 @@ static void pfe_configure_serdes(struct pfe_eth_dev *priv)
 	int value, sgmii_2500 = 0;
 	struct gemac_s *gem = priv->gem;
 
-	if (gem->phy_mode == PHY_INTERFACE_MODE_SGMII_2500)
+	if (gem->phy_mode == PHY_INTERFACE_MODE_2500BASEX)
 		sgmii_2500 = 1;
 
 
@@ -220,7 +220,7 @@ int pfe_phy_configure(struct pfe_eth_dev *priv, int dev_id, int phy_id)
 
 	/* Configure SGMII  PCS */
 	if (gem->phy_mode == PHY_INTERFACE_MODE_SGMII ||
-	    gem->phy_mode == PHY_INTERFACE_MODE_SGMII_2500) {
+	    gem->phy_mode == PHY_INTERFACE_MODE_2500BASEX) {
 		out_be32(&scfg->mdioselcr, 0x00000000);
 		pfe_configure_serdes(priv);
 	}
diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c
index 66d1d98568..83075f78c9 100644
--- a/drivers/net/phy/aquantia.c
+++ b/drivers/net/phy/aquantia.c
@@ -308,7 +308,7 @@ struct {
 } aquantia_syscfg[PHY_INTERFACE_MODE_COUNT] = {
 	[PHY_INTERFACE_MODE_SGMII] =      {0x04b, AQUANTIA_VND1_GSYSCFG_1G,
 					   AQUANTIA_VND1_GSTART_RATE_1G},
-	[PHY_INTERFACE_MODE_SGMII_2500] = {0x144, AQUANTIA_VND1_GSYSCFG_2_5G,
+	[PHY_INTERFACE_MODE_2500BASEX]  = {0x144, AQUANTIA_VND1_GSYSCFG_2_5G,
 					   AQUANTIA_VND1_GSTART_RATE_2_5G},
 	[PHY_INTERFACE_MODE_10GBASER] =   {0x100, AQUANTIA_VND1_GSYSCFG_10G,
 					   AQUANTIA_VND1_GSTART_RATE_10G},
@@ -522,7 +522,7 @@ int aquantia_config(struct phy_device *phydev)
 		phy_write(phydev, MDIO_MMD_PHYXS,
 			  AQUANTIA_VENDOR_PROVISIONING_REG, reg_val1);
 		break;
-	case PHY_INTERFACE_MODE_SGMII_2500:
+	case PHY_INTERFACE_MODE_2500BASEX:
 		/* 2.5GBASE-T mode */
 		phydev->advertising = SUPPORTED_1000baseT_Full;
 		phydev->supported = phydev->advertising;