diff options
author | Tom Rini <trini@konsulko.com> | 2019-05-09 14:11:52 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2019-05-09 14:11:52 +0300 |
commit | 7d41f2dcbe5b25c0099d74a610cc586b940c50ab (patch) | |
tree | 4284df3fa3784336f1bdd59f81daee26129dd89c | |
parent | 7aaf2af0e07f9923976372ff7a3ce7a0f8004723 (diff) | |
parent | 3cedc97479ff44cdc00485de7517a833e3dfb630 (diff) | |
download | u-boot-7d41f2dcbe5b25c0099d74a610cc586b940c50ab.tar.xz |
Merge git://git.denx.de/u-boot-riscv
- Correct SYS_TEXT_BASE for qemu.
- Support booti.
- Increase SYSBOOTM_LEN for Fedora/RISCV kernel.
- Support SMP booting from flash.
-rw-r--r-- | arch/riscv/Kconfig | 7 | ||||
-rw-r--r-- | arch/riscv/cpu/cpu.c | 4 | ||||
-rw-r--r-- | arch/riscv/cpu/start.S | 8 | ||||
-rw-r--r-- | arch/riscv/include/asm/global_data.h | 2 | ||||
-rw-r--r-- | arch/riscv/lib/Makefile | 1 | ||||
-rw-r--r-- | arch/riscv/lib/asm-offsets.c | 2 | ||||
-rw-r--r-- | arch/riscv/lib/image.c | 55 | ||||
-rw-r--r-- | arch/riscv/lib/smp.c | 2 | ||||
-rw-r--r-- | board/AndesTech/ax25-ae350/MAINTAINERS | 2 | ||||
-rw-r--r-- | board/AndesTech/ax25-ae350/ax25-ae350.c | 4 | ||||
-rw-r--r-- | board/emulation/qemu-riscv/Kconfig | 3 | ||||
-rw-r--r-- | cmd/Kconfig | 2 | ||||
-rw-r--r-- | cmd/booti.c | 8 | ||||
-rw-r--r-- | configs/ae350_rv32_defconfig | 2 | ||||
-rw-r--r-- | configs/ae350_rv32_xip_defconfig | 37 | ||||
-rw-r--r-- | configs/ae350_rv64_defconfig | 2 | ||||
-rw-r--r-- | configs/ae350_rv64_xip_defconfig | 38 | ||||
-rw-r--r-- | include/configs/ax25-ae350.h | 2 | ||||
-rw-r--r-- | include/configs/qemu-riscv.h | 16 |
19 files changed, 180 insertions, 17 deletions
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index ae8ff7b765..362f3cdc65 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -162,6 +162,13 @@ config SBI_IPI default y if RISCV_SMODE depends on SMP +config XIP + bool "XIP mode" + help + XIP (eXecute In Place) is a method for executing code directly + from a NOR flash memory without copying the code to ram. + Say yes here if U-Boot boots from flash directly. + config STACK_SIZE_SHIFT int default 13 diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index c32de8a4c3..e9a8b437ed 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -15,7 +15,10 @@ * The variables here must be stored in the data section since they are used * before the bss section is available. */ +#ifdef CONFIG_OF_PRIOR_STAGE phys_addr_t prior_stage_fdt_address __attribute__((section(".data"))); +#endif +#ifndef CONFIG_XIP u32 hart_lottery __attribute__((section(".data"))) = 0; /* @@ -23,6 +26,7 @@ u32 hart_lottery __attribute__((section(".data"))) = 0; * finished initialization of global data. */ u32 available_harts_lock = 1; +#endif static inline bool supports_extension(char ext) { diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index a4433fbd6b..60ac8c621e 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -98,6 +98,7 @@ call_board_init_f_0: mv sp, a0 #endif +#ifndef CONFIG_XIP /* * Pick hart to initialize global data and run U-Boot. The other harts * wait for initialization to complete. @@ -106,15 +107,21 @@ call_board_init_f_0: li s2, 1 amoswap.w s2, t1, 0(t0) bnez s2, wait_for_gd_init +#else + bnez tp, secondary_hart_loop +#endif +#ifdef CONFIG_OF_PRIOR_STAGE la t0, prior_stage_fdt_address SREG s1, 0(t0) +#endif jal board_init_f_init_reserve /* save the boot hart id to global_data */ SREG tp, GD_BOOT_HART(gp) +#ifndef CONFIG_XIP la t0, available_harts_lock fence rw, w amoswap.w zero, zero, 0(t0) @@ -141,6 +148,7 @@ wait_for_gd_init: * secondary_hart_loop. */ bnez s2, secondary_hart_loop +#endif /* Enable cache */ jal icache_enable diff --git a/arch/riscv/include/asm/global_data.h b/arch/riscv/include/asm/global_data.h index dffcd45bf0..b74bd7e738 100644 --- a/arch/riscv/include/asm/global_data.h +++ b/arch/riscv/include/asm/global_data.h @@ -27,7 +27,9 @@ struct arch_global_data { #ifdef CONFIG_SMP struct ipi_data ipi[CONFIG_NR_CPUS]; #endif +#ifndef CONFIG_XIP ulong available_harts; +#endif }; #include <asm-generic/global_data.h> diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index 1c332db436..6ae6ebbeaf 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib/Makefile @@ -7,6 +7,7 @@ # Rick Chen, Andes Technology Corporation <rick@andestech.com> obj-$(CONFIG_CMD_BOOTM) += bootm.o +obj-$(CONFIG_CMD_BOOTI) += bootm.o image.o obj-$(CONFIG_CMD_GO) += boot.o obj-y += cache.o obj-$(CONFIG_RISCV_RDTIME) += rdtime.o diff --git a/arch/riscv/lib/asm-offsets.c b/arch/riscv/lib/asm-offsets.c index f998402bd1..4fa4fd3714 100644 --- a/arch/riscv/lib/asm-offsets.c +++ b/arch/riscv/lib/asm-offsets.c @@ -14,7 +14,9 @@ int main(void) { DEFINE(GD_BOOT_HART, offsetof(gd_t, arch.boot_hart)); +#ifndef CONFIG_XIP DEFINE(GD_AVAILABLE_HARTS, offsetof(gd_t, arch.available_harts)); +#endif return 0; } diff --git a/arch/riscv/lib/image.c b/arch/riscv/lib/image.c new file mode 100644 index 0000000000..d063beb7df --- /dev/null +++ b/arch/riscv/lib/image.c @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Western Digital Corporation or its affiliates. + * Authors: + * Atish Patra <atish.patra@wdc.com> + * Based on arm/lib/image.c + */ + +#include <common.h> +#include <mapmem.h> +#include <errno.h> +#include <linux/sizes.h> +#include <linux/stddef.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* ASCII version of "RISCV" defined in Linux kernel */ +#define LINUX_RISCV_IMAGE_MAGIC 0x5643534952 + +struct linux_image_h { + uint32_t code0; /* Executable code */ + uint32_t code1; /* Executable code */ + uint64_t text_offset; /* Image load offset */ + uint64_t image_size; /* Effective Image size */ + uint64_t res1; /* reserved */ + uint64_t res2; /* reserved */ + uint64_t res3; /* reserved */ + uint64_t magic; /* Magic number */ + uint32_t res4; /* reserved */ + uint32_t res5; /* reserved */ +}; + +int booti_setup(ulong image, ulong *relocated_addr, ulong *size, + bool force_reloc) +{ + struct linux_image_h *lhdr; + + lhdr = (struct linux_image_h *)map_sysmem(image, 0); + + if (lhdr->magic != LINUX_RISCV_IMAGE_MAGIC) { + puts("Bad Linux RISCV Image magic!\n"); + return -EINVAL; + } + + if (lhdr->image_size == 0) { + puts("Image lacks image_size field, error!\n"); + return -EINVAL; + } + *size = lhdr->image_size; + *relocated_addr = gd->ram_base + lhdr->text_offset; + + unmap_sysmem(lhdr); + + return 0; +} diff --git a/arch/riscv/lib/smp.c b/arch/riscv/lib/smp.c index caa292ccd2..cc66f15567 100644 --- a/arch/riscv/lib/smp.c +++ b/arch/riscv/lib/smp.c @@ -63,9 +63,11 @@ static int send_ipi_many(struct ipi_data *ipi) continue; } +#ifndef CONFIG_XIP /* skip if hart is not available */ if (!(gd->arch.available_harts & (1 << reg))) continue; +#endif gd->arch.ipi[reg].addr = ipi->addr; gd->arch.ipi[reg].arg0 = ipi->arg0; diff --git a/board/AndesTech/ax25-ae350/MAINTAINERS b/board/AndesTech/ax25-ae350/MAINTAINERS index b0a99e4ac4..feed5d1298 100644 --- a/board/AndesTech/ax25-ae350/MAINTAINERS +++ b/board/AndesTech/ax25-ae350/MAINTAINERS @@ -5,3 +5,5 @@ F: board/AndesTech/ax25-ae350/ F: include/configs/ax25-ae350.h F: configs/ae350_rv32_defconfig F: configs/ae350_rv64_defconfig +F: configs/ae350_rv32_xip_defconfig +F: configs/ae350_rv64_xip_defconfig diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c index d343453f22..3d65ce7b75 100644 --- a/board/AndesTech/ax25-ae350/ax25-ae350.c +++ b/board/AndesTech/ax25-ae350/ax25-ae350.c @@ -67,10 +67,6 @@ ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) void *board_fdt_blob_setup(void) { - void **ptr = (void *)&prior_stage_fdt_address; - if (fdt_magic(*ptr) == FDT_MAGIC) - return (void *)*ptr; - return (void *)CONFIG_SYS_FDT_BASE; } diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig index cf057e7de6..20ea6dc59b 100644 --- a/board/emulation/qemu-riscv/Kconfig +++ b/board/emulation/qemu-riscv/Kconfig @@ -14,7 +14,8 @@ config SYS_CONFIG_NAME config SYS_TEXT_BASE default 0x80000000 if !RISCV_SMODE - default 0x80200000 if RISCV_SMODE + default 0x80200000 if RISCV_SMODE && ARCH_RV64I + default 0x80400000 if RISCV_SMODE && ARCH_RV32I config BOARD_SPECIFIC_OPTIONS # dummy def_bool y diff --git a/cmd/Kconfig b/cmd/Kconfig index 069e0ea730..4e11e0f404 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -223,7 +223,7 @@ config CMD_BOOTZ config CMD_BOOTI bool "booti" - depends on ARM64 + depends on ARM64 || RISCV default y help Boot an AArch64 Linux Kernel image from memory. diff --git a/cmd/booti.c b/cmd/booti.c index 04353b68ec..c36b0235df 100644 --- a/cmd/booti.c +++ b/cmd/booti.c @@ -77,7 +77,11 @@ int do_booti(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) bootm_disable_interrupts(); images.os.os = IH_OS_LINUX; +#ifdef CONFIG_RISCV_SMODE + images.os.arch = IH_ARCH_RISCV; +#elif CONFIG_ARM64 images.os.arch = IH_ARCH_ARM64; +#endif ret = do_bootm_states(cmdtp, flag, argc, argv, #ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH BOOTM_STATE_RAMDISK | @@ -92,7 +96,7 @@ int do_booti(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_SYS_LONGHELP static char booti_help_text[] = "[addr [initrd[:size]] [fdt]]\n" - " - boot arm64 Linux Image stored in memory\n" + " - boot Linux 'Image' stored at 'addr'\n" "\tThe argument 'initrd' is optional and specifies the address\n" "\tof an initrd in memory. The optional parameter ':size' allows\n" "\tspecifying the size of a RAW initrd.\n" @@ -107,5 +111,5 @@ static char booti_help_text[] = U_BOOT_CMD( booti, CONFIG_SYS_MAXARGS, 1, do_booti, - "boot arm64 Linux Image image from memory", booti_help_text + "boot Linux kernel 'Image' format from memory", booti_help_text ); diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig index 2f759e4d2c..a31027016b 100644 --- a/configs/ae350_rv32_defconfig +++ b/configs/ae350_rv32_defconfig @@ -14,7 +14,7 @@ CONFIG_CMD_SF_TEST=y # CONFIG_CMD_SETEXPR is not set CONFIG_BOOTP_PREFER_SERVERIP=y CONFIG_CMD_CACHE=y -CONFIG_OF_BOARD=y +CONFIG_OF_PRIOR_STAGE=y CONFIG_DEFAULT_DEVICE_TREE="ae350_32" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/ae350_rv32_xip_defconfig b/configs/ae350_rv32_xip_defconfig new file mode 100644 index 0000000000..07f1ecc2fc --- /dev/null +++ b/configs/ae350_rv32_xip_defconfig @@ -0,0 +1,37 @@ +CONFIG_RISCV=y +CONFIG_SYS_TEXT_BASE=0x80000000 +CONFIG_XIP=y +CONFIG_TARGET_AX25_AE350=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_FIT=y +CONFIG_BOOTDELAY=3 +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_PROMPT="RISC-V # " +CONFIG_CMD_IMLS=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_SF_TEST=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_PREFER_SERVERIP=y +CONFIG_CMD_CACHE=y +CONFIG_OF_SEPARATE=y +CONFIG_DEFAULT_DEVICE_TREE="ae350_32" +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_MMC=y +CONFIG_FTSDC010=y +CONFIG_FTSDC010_SDIO=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_SPI_FLASH=y +CONFIG_SF_DEFAULT_MODE=0x0 +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_FTMAC100=y +CONFIG_BAUDRATE=38400 +CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_ATCSPI200_SPI=y diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig index 287769d5b1..d425252ec8 100644 --- a/configs/ae350_rv64_defconfig +++ b/configs/ae350_rv64_defconfig @@ -15,7 +15,7 @@ CONFIG_CMD_SF_TEST=y # CONFIG_CMD_SETEXPR is not set CONFIG_BOOTP_PREFER_SERVERIP=y CONFIG_CMD_CACHE=y -CONFIG_OF_BOARD=y +CONFIG_OF_PRIOR_STAGE=y CONFIG_DEFAULT_DEVICE_TREE="ae350_64" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/ae350_rv64_xip_defconfig b/configs/ae350_rv64_xip_defconfig new file mode 100644 index 0000000000..28afd81fc8 --- /dev/null +++ b/configs/ae350_rv64_xip_defconfig @@ -0,0 +1,38 @@ +CONFIG_RISCV=y +CONFIG_SYS_TEXT_BASE=0x80000000 +CONFIG_XIP=y +CONFIG_TARGET_AX25_AE350=y +CONFIG_ARCH_RV64I=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_FIT=y +CONFIG_BOOTDELAY=3 +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_PROMPT="RISC-V # " +CONFIG_CMD_IMLS=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_SF_TEST=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_PREFER_SERVERIP=y +CONFIG_CMD_CACHE=y +CONFIG_OF_SEPARATE=y +CONFIG_DEFAULT_DEVICE_TREE="ae350_64" +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_MMC=y +CONFIG_FTSDC010=y +CONFIG_FTSDC010_SDIO=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_SPI_FLASH=y +CONFIG_SF_DEFAULT_MODE=0x0 +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_FTMAC100=y +CONFIG_BAUDRATE=38400 +CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_ATCSPI200_SPI=y diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index 395f3a442d..a4037f33dd 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -40,7 +40,7 @@ #define CONFIG_SYS_MALLOC_LEN (512 << 10) /* DT blob (fdt) address */ -#define CONFIG_SYS_FDT_BASE 0x000f0000 +#define CONFIG_SYS_FDT_BASE 0x800f0000 /* * Physical Memory Map diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h index 2588c5a0b2..b7110edebc 100644 --- a/include/configs/qemu-riscv.h +++ b/include/configs/qemu-riscv.h @@ -15,7 +15,7 @@ #define CONFIG_SYS_MALLOC_LEN SZ_8M -#define CONFIG_SYS_BOOTM_LEN SZ_16M +#define CONFIG_SYS_BOOTM_LEN SZ_64M #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 @@ -41,11 +41,15 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffffffffffff\0" \ "initrd_high=0xffffffffffffffff\0" \ - "kernel_addr_r=0x81000000\0" \ - "fdt_addr_r=0x82000000\0" \ - "scriptaddr=0x82100000\0" \ - "pxefile_addr_r=0x82200000\0" \ - "ramdisk_addr_r=0x82300000\0" \ + "kernel_addr_r=0x84000000\0" \ + "fdt_addr_r=0x88000000\0" \ + "scriptaddr=0x88100000\0" \ + "pxefile_addr_r=0x88200000\0" \ + "ramdisk_addr_r=0x88300000\0" \ BOOTENV +#define CONFIG_PREBOOT \ + "setenv fdt_addr ${fdtcontroladdr};" \ + "fdt addr ${fdtcontroladdr};" + #endif /* __CONFIG_H */ |