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author | Jernej Skrabec <jernej.skrabec@siol.net> | 2021-01-11 23:11:41 +0300 |
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committer | Andre Przywara <andre.przywara@arm.com> | 2021-01-26 00:52:01 +0300 |
commit | c13d98b77eb4746f2463b23b0adce66153705add (patch) | |
tree | 2e324dc40deac84a1d535fed6e717cd8d4ef4a80 | |
parent | b18bd53d6cde6cd458f279a667eaaf6082c1af45 (diff) | |
download | u-boot-c13d98b77eb4746f2463b23b0adce66153705add.tar.xz |
sunxi: add support for H616 uart0
This port is used for debug terminal on all known H616 boards.
Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-rw-r--r-- | arch/arm/include/asm/arch-sunxi/gpio.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-sunxi/board.c | 4 |
2 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h index f817d328f4..cdb7dbd5b8 100644 --- a/arch/arm/include/asm/arch-sunxi/gpio.h +++ b/arch/arm/include/asm/arch-sunxi/gpio.h @@ -206,6 +206,7 @@ enum sunxi_gpio_number { #define SUN6I_GPH_UART0 2 #define SUN9I_GPH_UART0 2 #define SUN50I_H6_GPH_UART0 2 +#define SUN50I_H616_GPH_UART0 2 #define SUNXI_GPI_SDC3 2 #define SUN7I_GPI_TWI3 3 diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index d90c7c04ec..ae6bc656d9 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -116,6 +116,10 @@ static int gpio_init(void) sunxi_gpio_set_cfgpin(SUNXI_GPH(0), SUN50I_H6_GPH_UART0); sunxi_gpio_set_cfgpin(SUNXI_GPH(1), SUN50I_H6_GPH_UART0); sunxi_gpio_set_pull(SUNXI_GPH(1), SUNXI_GPIO_PULL_UP); +#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN50I_H616) + sunxi_gpio_set_cfgpin(SUNXI_GPH(0), SUN50I_H616_GPH_UART0); + sunxi_gpio_set_cfgpin(SUNXI_GPH(1), SUN50I_H616_GPH_UART0); + sunxi_gpio_set_pull(SUNXI_GPH(1), SUNXI_GPIO_PULL_UP); #elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN8I_A83T) sunxi_gpio_set_cfgpin(SUNXI_GPB(9), SUN8I_A83T_GPB_UART0); sunxi_gpio_set_cfgpin(SUNXI_GPB(10), SUN8I_A83T_GPB_UART0); |