summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorPali Rohár <pali@kernel.org>2021-11-25 13:30:58 +0300
committerTom Rini <trini@konsulko.com>2022-01-12 22:21:24 +0300
commitf2094143c5367f38c74d4233a65afb07a25a8ace (patch)
treea26aa767a082028b66399adf816a4a23a0d84eff
parentbf667d5f15a75c2f1d4715ac3b7525b300ae1c58 (diff)
downloadu-boot-f2094143c5367f38c74d4233a65afb07a25a8ace.tar.xz
pci: Fix register for determining type of IO base address
Function dm_pciauto_prescan_setup_bridge() configures base address registers, therefore it should read type of IO from base address registers (and not from limit address registers). Note that base and limit address registers should have same type, so this change is just usage correction and has no functional change on correctly working hardware. Fixes: 8e85f36a8fab ("pci: Fix configuring io/memory base and limit registers of PCI bridges") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
-rw-r--r--drivers/pci/pci_auto.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index 5af4ee6e56..7e6ee54be0 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -197,7 +197,7 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev, int sub_bus)
dm_pci_read_config16(dev, PCI_COMMAND, &cmdstat);
dm_pci_read_config16(dev, PCI_PREF_MEMORY_BASE, &prefechable_64);
prefechable_64 &= PCI_PREF_RANGE_TYPE_MASK;
- dm_pci_read_config8(dev, PCI_IO_LIMIT, &io_32);
+ dm_pci_read_config8(dev, PCI_IO_BASE, &io_32);
io_32 &= PCI_IO_RANGE_TYPE_MASK;
/* Configure bus number registers */