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| author | Álvaro Fernández Rojas <noltari@gmail.com> | 2018-02-04 23:10:14 +0300 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2018-03-22 01:23:13 +0300 |
| commit | fc5cf3a0c761fea15036279f92cf300407c5477b (patch) | |
| tree | 4a8deb0e3bf23505a462ddfb574bdf053df13d39 | |
| parent | f55c1538bf163055a2891d1f0c2ac7fff8bb9b02 (diff) | |
| download | u-boot-fc5cf3a0c761fea15036279f92cf300407c5477b.tar.xz | |
mips: bmips: add support for bcm6368 usb
Signed-off-by: Ãlvaro Fernández Rojas <noltari@gmail.com>
| -rw-r--r-- | arch/mips/dts/brcm,bcm6368.dtsi | 29 | ||||
| -rw-r--r-- | include/configs/bmips_bcm6368.h | 7 |
2 files changed, 36 insertions, 0 deletions
diff --git a/arch/mips/dts/brcm,bcm6368.dtsi b/arch/mips/dts/brcm,bcm6368.dtsi index 1bb538a1f3..fc1c5a244f 100644 --- a/arch/mips/dts/brcm,bcm6368.dtsi +++ b/arch/mips/dts/brcm,bcm6368.dtsi @@ -164,5 +164,34 @@ reg = <0x10001200 0x4c>; u-boot,dm-pre-reloc; }; + + ehci: usb-controller@10001500 { + compatible = "brcm,bcm6368-ehci", "generic-ehci"; + reg = <0x10001500 0x100>; + phys = <&usbh>; + big-endian; + + status = "disabled"; + }; + + ohci: usb-controller@10001600 { + compatible = "brcm,bcm6368-ohci", "generic-ohci"; + reg = <0x10001600 0x100>; + phys = <&usbh>; + big-endian; + + status = "disabled"; + }; + + usbh: usb-phy@10001700 { + compatible = "brcm,bcm6368-usbh"; + reg = <0x10001700 0x38>; + #phy-cells = <0>; + clocks = <&periph_clk BCM6368_CLK_USBH>; + clock-names = "usbh"; + resets = <&periph_rst BCM6368_RST_USBH>; + + status = "disabled"; + }; }; }; diff --git a/include/configs/bmips_bcm6368.h b/include/configs/bmips_bcm6368.h index ce35fae6a0..ad8877b7d3 100644 --- a/include/configs/bmips_bcm6368.h +++ b/include/configs/bmips_bcm6368.h @@ -14,6 +14,13 @@ #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x80000000 +/* USB */ +#define CONFIG_EHCI_DESC_BIG_ENDIAN +#define CONFIG_EHCI_MMIO_BIG_ENDIAN +#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 +#define CONFIG_USB_OHCI_NEW + /* U-Boot */ #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000 |