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authorTom Rini <trini@konsulko.com>2022-12-04 18:13:49 +0300
committerTom Rini <trini@konsulko.com>2022-12-23 18:15:12 +0300
commitff53ecc3877c6f4b1cc035a44b43b9c50e1fabc8 (patch)
treefe6ae7830a8dc365637e048bad0a88f9aa05d7c6
parentc253cea724555890f533c8446fc53eff01ec39a0 (diff)
downloadu-boot-ff53ecc3877c6f4b1cc035a44b43b9c50e1fabc8.tar.xz
global: Migrate CONFIG_SH_ETHER_CACHE_WRITEBACK to CFG
Perform a simple rename of CONFIG_SH_ETHER_CACHE_WRITEBACK to CFG_SH_ETHER_CACHE_WRITEBACK Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat
-rw-r--r--README2
-rw-r--r--drivers/net/sh_eth.c2
-rw-r--r--include/configs/alt.h2
-rw-r--r--include/configs/condor.h2
-rw-r--r--include/configs/gose.h2
-rw-r--r--include/configs/grpeach.h2
-rw-r--r--include/configs/koelsch.h2
-rw-r--r--include/configs/lager.h2
-rw-r--r--include/configs/porter.h2
-rw-r--r--include/configs/silk.h2
-rw-r--r--include/configs/stout.h2
11 files changed, 11 insertions, 11 deletions
diff --git a/README b/README
index 2d3a48e88a..5f688d70f3 100644
--- a/README
+++ b/README
@@ -547,7 +547,7 @@ The following options need to be configured:
CONFIG_SH_ETHER_PHY_ADDR
Define the ETH PHY's address
- CONFIG_SH_ETHER_CACHE_WRITEBACK
+ CFG_SH_ETHER_CACHE_WRITEBACK
If this option is set, the driver enables cache flush.
- TPM Support:
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 63b21969d5..0053733075 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -37,7 +37,7 @@
# error "Please define CONFIG_SH_ETHER_PHY_ADDR"
#endif
-#if defined(CONFIG_SH_ETHER_CACHE_WRITEBACK) && \
+#if defined(CFG_SH_ETHER_CACHE_WRITEBACK) && \
!CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
#define flush_cache_wback(addr, len) \
flush_dcache_range((unsigned long)addr, \
diff --git a/include/configs/alt.h b/include/configs/alt.h
index 7a29157ef4..2b78325273 100644
--- a/include/configs/alt.h
+++ b/include/configs/alt.h
@@ -24,7 +24,7 @@
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
diff --git a/include/configs/condor.h b/include/configs/condor.h
index fa3edef9b3..3f99cbf9da 100644
--- a/include/configs/condor.h
+++ b/include/configs/condor.h
@@ -17,7 +17,7 @@
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
diff --git a/include/configs/gose.h b/include/configs/gose.h
index e54f4b24e0..45a537341b 100644
--- a/include/configs/gose.h
+++ b/include/configs/gose.h
@@ -23,7 +23,7 @@
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h
index 5ae17f70e9..3fde614070 100644
--- a/include/configs/grpeach.h
+++ b/include/configs/grpeach.h
@@ -20,7 +20,7 @@
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h
index 1d8aa6def8..b3b6f03e08 100644
--- a/include/configs/koelsch.h
+++ b/include/configs/koelsch.h
@@ -23,7 +23,7 @@
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
diff --git a/include/configs/lager.h b/include/configs/lager.h
index bb8cc5fecb..16d15ccdd9 100644
--- a/include/configs/lager.h
+++ b/include/configs/lager.h
@@ -24,7 +24,7 @@
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
diff --git a/include/configs/porter.h b/include/configs/porter.h
index 143e9a4672..f217141af8 100644
--- a/include/configs/porter.h
+++ b/include/configs/porter.h
@@ -25,7 +25,7 @@
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
diff --git a/include/configs/silk.h b/include/configs/silk.h
index 2d1e23c274..09c23d379e 100644
--- a/include/configs/silk.h
+++ b/include/configs/silk.h
@@ -25,7 +25,7 @@
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
diff --git a/include/configs/stout.h b/include/configs/stout.h
index 9e05a7ae6f..dd44b3e6d0 100644
--- a/include/configs/stout.h
+++ b/include/configs/stout.h
@@ -29,7 +29,7 @@
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
generated by cgit v1.2.3 (git 2.39.0) at 2024-07-25 07:57:52 +0300