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author | Ryan Chen <ryan_chen@aspeedtech.com> | 2023-01-30 09:19:24 +0300 |
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committer | Heiko Schocher <hs@denx.de> | 2023-02-13 11:57:49 +0300 |
commit | 4088f5fce86dd02194f38587fefaa86762897387 (patch) | |
tree | 077b657e32b9c33cd3bdde1352af6229f0943df2 /MAINTAINERS | |
parent | 371be1e012cbe47fd2f7545a949e4ffb55d8608b (diff) | |
download | u-boot-4088f5fce86dd02194f38587fefaa86762897387.tar.xz |
i2c:aspeed:support ast2600 i2c new register mode driver
Add i2c new register mode driver to support AST2600 i2c
new register mode. AST2600 i2c controller have legacy and
new register mode. The new register mode have global register
support 4 base clock for scl clock selection, and new clock
divider mode.
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'MAINTAINERS')
-rw-r--r-- | MAINTAINERS | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index b9c505d5fa..6f53f9c2f6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -774,6 +774,12 @@ S: Maintained F: drivers/pci/pcie_phytium.c F: arch/arm/dts/phytium-durian.dts +ASPEED AST2600 I2C DRIVER +M: Ryan Chen <ryan_chen@aspeedtech.com> +R: Aspeed BMC SW team <BMC-SW@aspeedtech.com> +S: Maintained +F: drivers/i2c/ast2600_i2c.c + ASPEED FMC SPI DRIVER M: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> M: Cédric Le Goater <clg@kaod.org> |