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| author | Tom Rini <trini@konsulko.com> | 2022-07-23 20:05:12 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-08-04 23:18:48 +0300 |
| commit | 78475d2572615471d3c047e61481a68859d0dd7f (patch) | |
| tree | d0de486d8215feedc0eba48c2e2b4428bd66d284 /README | |
| parent | 7da6a9e7df2f31f35391925042f58b19c7b7d9e4 (diff) | |
| download | u-boot-78475d2572615471d3c047e61481a68859d0dd7f.tar.xz | |
Convert CONFIG_SYS_FSL_DDR_INTLV_256B to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_FSL_DDR_INTLV_256B
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'README')
| -rw-r--r-- | README | 5 |
1 files changed, 0 insertions, 5 deletions
@@ -413,11 +413,6 @@ The following options need to be configured: same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But it could be different for ARM SoCs. - CONFIG_SYS_FSL_DDR_INTLV_256B - DDR controller interleaving on 256-byte. This is a special - interleaving mode, handled by Dickens for Freescale layerscape - SoCs with ARM core. - CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS Number of controllers used as main memory. |