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authorRan Wang <ran.wang_1@nxp.com>2017-09-04 13:46:53 +0300
committerYork Sun <york.sun@nxp.com>2017-09-11 18:01:06 +0300
commitc1853f6f7348d86faead6ffe30c25db9d7cef144 (patch)
tree665be5b5b5449929dbc26447008cc711d60ff714 /arch/arm/cpu/armv7/ls102xa/Kconfig
parent83fa71189af3354cd09a56d61f3ed31ce082f51f (diff)
downloadu-boot-c1853f6f7348d86faead6ffe30c25db9d7cef144.tar.xz
armv7: Add workaround for USB erratum A-009798
The default setting for USB High Speed Squelch Threshold results in a threshold close to or lower than 100mV. This leads to Receive Compliance test failure for a 100mV threshold. Shift the threshold from ~100mV towards ~130mV by setting SQRXTUNE to 0x0 to pass USB High Speed Receiver Sensitivity Compliance test. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com> Signed-off-by: Ran Wang <ran.wang_1@nxp.com> [YS: Reordered Kconfig options] Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/cpu/armv7/ls102xa/Kconfig')
-rw-r--r--arch/arm/cpu/armv7/ls102xa/Kconfig6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig
index be30dd8442..a9fc65ff11 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -4,6 +4,7 @@ config ARCH_LS1021A
select SYS_FSL_ERRATUM_A008407
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009663
+ select SYS_FSL_ERRATUM_A009798
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_A010315
select SYS_FSL_HAS_CCI400
@@ -64,6 +65,11 @@ config SYS_FSL_ERRATUM_A009008
help
Workaround for USB PHY erratum A009008
+config SYS_FSL_ERRATUM_A009798
+ bool
+ help
+ Workaround for USB PHY erratum A009798
+
config SYS_FSL_ERRATUM_A010315
bool "Workaround for PCIe erratum A010315"