diff options
| author | Tom Rini <trini@konsulko.com> | 2017-04-18 18:36:06 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-04-18 18:36:06 +0300 |
| commit | 3c476d841daa491f87c8f07851038afbdf4d90a8 (patch) | |
| tree | 131891877d7b9b112ebc8c05ab88d53b9b18b702 /arch/arm/cpu/armv8/fsl-layerscape/cpu.c | |
| parent | 9481f186d0bb06e492f62144cacdb5a8367e3cd2 (diff) | |
| parent | e0dfec863e2ca5088dd797a5b6853d4c0df9002c (diff) | |
| download | u-boot-3c476d841daa491f87c8f07851038afbdf4d90a8.tar.xz | |
Merge git://git.denx.de/u-boot-fsl-qoriq
Diffstat (limited to 'arch/arm/cpu/armv8/fsl-layerscape/cpu.c')
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index d446527616..c24f3f173c 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -92,7 +92,7 @@ static inline void early_mmu_setup(void) static void fix_pcie_mmu_map(void) { -#ifdef CONFIG_LS2080A +#ifdef CONFIG_ARCH_LS2080A unsigned int i; u32 svr, ver; struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); @@ -523,7 +523,7 @@ int timer_init(void) #ifdef CONFIG_FSL_LSCH3 u32 __iomem *cltbenr = (u32 *)CONFIG_SYS_FSL_PMU_CLTBENR; #endif -#ifdef CONFIG_LS2080A +#ifdef CONFIG_ARCH_LS2080A u32 __iomem *pctbenr = (u32 *)FSL_PMU_PCTBENR_OFFSET; u32 svr_dev_id; #endif @@ -541,7 +541,7 @@ int timer_init(void) out_le32(cltbenr, 0xf); #endif -#ifdef CONFIG_LS2080A +#ifdef CONFIG_ARCH_LS2080A /* * In certain Layerscape SoCs, the clock for each core's * has an enable bit in the PMU Physical Core Time Base Enable |