diff options
author | Tom Rini <trini@konsulko.com> | 2016-04-06 21:17:22 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2016-04-06 21:17:22 +0300 |
commit | 43d3fb5c0609a76409e7859a2a5800670c7b5bd2 (patch) | |
tree | 562ebcc0e6a22077140b10efce77f44340b819ac /arch/arm/cpu/armv8/fsl-layerscape/soc.c | |
parent | 46a16bd895144617575c788d9c2554aeef76ac44 (diff) | |
parent | 3c1d218a1d3048fb576677c47eab43049d0b7778 (diff) | |
download | u-boot-43d3fb5c0609a76409e7859a2a5800670c7b5bd2.tar.xz |
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Diffstat (limited to 'arch/arm/cpu/armv8/fsl-layerscape/soc.c')
-rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/soc.c | 26 |
1 files changed, 25 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index a76447ec27..0cb010012e 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -18,7 +18,31 @@ DECLARE_GLOBAL_DATA_PTR; -#if defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A) +bool soc_has_dp_ddr(void) +{ + struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); + u32 svr = gur_in32(&gur->svr); + + /* LS2085A has DP_DDR */ + if (SVR_SOC_VER(svr) == SVR_LS2085) + return true; + + return false; +} + +bool soc_has_aiop(void) +{ + struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); + u32 svr = gur_in32(&gur->svr); + + /* LS2085A has AIOP */ + if (SVR_SOC_VER(svr) == SVR_LS2085) + return true; + + return false; +} + +#ifdef CONFIG_LS2080A /* * This erratum requires setting a value to eddrtqcr1 to * optimal the DDR performance. |