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| author | Mihai Sain <mihai.sain@microchip.com> | 2021-08-17 13:29:22 +0300 |
|---|---|---|
| committer | Eugen Hristev <eugen.hristev@microchip.com> | 2021-09-21 10:05:38 +0300 |
| commit | 5b435084190d65a7e22314fe2db504dec4dcd08b (patch) | |
| tree | a4f5751f809de746844bb0f8de316de88857307a /arch/arm/dts/at91-sama5d2_icp.dts | |
| parent | c1f7ef9ab3a6a307b822cbccda5b2c4f4bbb5a7c (diff) | |
| download | u-boot-5b435084190d65a7e22314fe2db504dec4dcd08b.tar.xz | |
ARM: dts: at91: sama5d2_icp: add QSPI1 device
Add support for sst26vf064b 64Mbit qspi-flash that is
present on sama5d2_icp board.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
[eugen.hristev@microchip.com: move u-boot properties to sama5d2_icp-u-boot.dtsi]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Diffstat (limited to 'arch/arm/dts/at91-sama5d2_icp.dts')
| -rw-r--r-- | arch/arm/dts/at91-sama5d2_icp.dts | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm/dts/at91-sama5d2_icp.dts b/arch/arm/dts/at91-sama5d2_icp.dts index f81fa60171..2c6e91c1c7 100644 --- a/arch/arm/dts/at91-sama5d2_icp.dts +++ b/arch/arm/dts/at91-sama5d2_icp.dts @@ -33,6 +33,21 @@ }; apb { + + qspi1: spi@f0024000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_qspi1_sck_cs_default &pinctrl_qspi1_dat_default>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <83000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + }; + }; + uart0: serial@f801c000 { /* mikrobus1 uart */ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mikrobus1_uart>; @@ -109,6 +124,20 @@ bias-pull-up; }; + pinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default { + pinmux = <PIN_PA6__QSPI1_SCK>, + <PIN_PA11__QSPI1_CS>; + bias-disable; + }; + + pinctrl_qspi1_dat_default: qspi1_dat_default { + pinmux = <PIN_PA7__QSPI1_IO0>, + <PIN_PA8__QSPI1_IO1>, + <PIN_PA9__QSPI1_IO2>, + <PIN_PA10__QSPI1_IO3>; + bias-pull-up; + }; + pinctrl_sdmmc0_default: sdmmc0_default { pinmux = <PIN_PA1__SDMMC0_CMD>, <PIN_PA2__SDMMC0_DAT0>, |