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| author | Michael Walle <michael@walle.cc> | 2021-10-13 19:14:25 +0300 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2021-11-09 14:48:23 +0300 |
| commit | d08011d7f9b4dfb846b61dbdd5ced92d0ba2a259 (patch) | |
| tree | 6a288c9ed600934e7c6cb4867b9019d045d90738 /arch/arm/dts/fsl-ls1028a.dtsi | |
| parent | 938d9355e612a90f17b5ce81d2c053ade553cb26 (diff) | |
| download | u-boot-d08011d7f9b4dfb846b61dbdd5ced92d0ba2a259.tar.xz | |
arm: dts: ls1028a: disable the PCIe controller by default
Disable the PCIe controllers by default, just like in the linux device
tree. But there is one catch, for linux they are enabled in-place by the
bootloader. Obviously, this doesn't work for the bootloader. Thus we
explicitly enable the controllers in the -u-boot.dtsi files.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'arch/arm/dts/fsl-ls1028a.dtsi')
| -rw-r--r-- | arch/arm/dts/fsl-ls1028a.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi index f11e75032b..d2f558d208 100644 --- a/arch/arm/dts/fsl-ls1028a.dtsi +++ b/arch/arm/dts/fsl-ls1028a.dtsi @@ -354,6 +354,7 @@ bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x80 0x00010000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + status = "disabled"; }; pcie2: pcie@3500000 { @@ -367,6 +368,7 @@ bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x88 0x00010000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + status = "disabled"; }; cluster1_core0_watchdog: wdt@c000000 { |