diff options
| author | Tom Rini <trini@konsulko.com> | 2021-01-06 00:20:26 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-01-06 00:20:26 +0300 |
| commit | 720620e6916ba40b9a173bb07706d2c73f3c23e7 (patch) | |
| tree | b085821f1d1137d80e9bb73f405ea0680db338b9 /arch/arm/dts/fsl-lx2162a-qds-sd1-20.dtsi | |
| parent | c86b18074c9d40bfa63cda1068b6dfb810d4377d (diff) | |
| parent | 62b07b5173e3d04fabfac42cf1f4779d021f94ad (diff) | |
| download | u-boot-720620e6916ba40b9a173bb07706d2c73f3c23e7.tar.xz | |
Merge tag 'v2021.01-rc5' into next
Prepare v2021.01-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/dts/fsl-lx2162a-qds-sd1-20.dtsi')
| -rw-r--r-- | arch/arm/dts/fsl-lx2162a-qds-sd1-20.dtsi | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/dts/fsl-lx2162a-qds-sd1-20.dtsi b/arch/arm/dts/fsl-lx2162a-qds-sd1-20.dtsi new file mode 100644 index 0000000000..faf4285eab --- /dev/null +++ b/arch/arm/dts/fsl-lx2162a-qds-sd1-20.dtsi @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * NXP LX2162AQDS device tree source for the SERDES block #1 - protocol 20 + * + * Some assumptions are made: + * * Mezzanine card M8 is connected to IO SLOT1 + * (xlaui4 for DPMAC 1) + * + * Copyright 2020 NXP + * + */ + +#include "fsl-lx2160a-qds.dtsi" + +&dpmac1 { + status = "okay"; + phy-handle = <&cortina_phy1_0>; + phy-connection-type = "xlaui4"; +}; + +&emdio1_slot1 { + cortina_phy1_0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0x0>; + }; +}; |