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| author | Tom Rini <trini@konsulko.com> | 2021-09-29 14:58:20 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-09-29 14:58:20 +0300 |
| commit | 6eecaf5d0f6b9a500dd5798f1f2bc8296bcfe158 (patch) | |
| tree | 1307de30a7d4cc6e5db9a3d78f583d288a5dbbdb /arch/arm/dts/fsl-sch-30842.dtsi | |
| parent | ba17871884c10f64082ddba2f0632ec44a3ae490 (diff) | |
| parent | 4df9f5e39fb224a4857c3411b4cbe419e4d339e8 (diff) | |
| download | u-boot-6eecaf5d0f6b9a500dd5798f1f2bc8296bcfe158.tar.xz | |
Merge branch 'network_master' of https://source.denx.de/u-boot/custodians/u-boot-net into next
- Fix some non-NULL terminated strings in the networking subsystem
- net: tsec: Mark tsec_get_interface as __maybe_unused
Diffstat (limited to 'arch/arm/dts/fsl-sch-30842.dtsi')
| -rw-r--r-- | arch/arm/dts/fsl-sch-30842.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/dts/fsl-sch-30842.dtsi b/arch/arm/dts/fsl-sch-30842.dtsi index fa0f2cdb10..bff9e76570 100644 --- a/arch/arm/dts/fsl-sch-30842.dtsi +++ b/arch/arm/dts/fsl-sch-30842.dtsi @@ -2,13 +2,13 @@ /* * Device tree fragment for RCW SCH-30842 card * - * Copyright 2019-2021 NXP Semiconductors + * Copyright 2019-2021 NXP */ /* * SCH-30842 is a single port add-on card used with various FSL QDS boards. * It integrates a AQR112 PHY, which supports several protocols - SGMII, - * SGMII-2500, USXGMII, XFI. + * 2500base-x, USXGMII, 10GBase-R. * PHY address is 0x02. */ phy@02 { |