diff options
author | Tim Harvey <tharvey@gateworks.com> | 2022-11-11 19:03:06 +0300 |
---|---|---|
committer | Stefano Babic <sbabic@denx.de> | 2023-01-31 20:08:23 +0300 |
commit | a4dc847b6017cfedd246623ed29e6f85ae0b67c6 (patch) | |
tree | 511153d6adec19f8a0029449afe5031b1998cf06 /arch/arm/dts/imx8mm-venice-gw7901.dts | |
parent | 4e2e2f898414c25f23349e19d2d0e9183ec6cab4 (diff) | |
download | u-boot-a4dc847b6017cfedd246623ed29e6f85ae0b67c6.tar.xz |
arm: dts: imx8m*-venice-*: add I2C GPIO bus recovery support
Add I2C GPIO bus recovery support by adding scl-gpios and sda-gpios for the
various I2C busses on Gateworks Venice boards.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Diffstat (limited to 'arch/arm/dts/imx8mm-venice-gw7901.dts')
-rw-r--r-- | arch/arm/dts/imx8mm-venice-gw7901.dts | 48 |
1 files changed, 44 insertions, 4 deletions
diff --git a/arch/arm/dts/imx8mm-venice-gw7901.dts b/arch/arm/dts/imx8mm-venice-gw7901.dts index d3ee6fc4ba..826627bd45 100644 --- a/arch/arm/dts/imx8mm-venice-gw7901.dts +++ b/arch/arm/dts/imx8mm-venice-gw7901.dts @@ -326,8 +326,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "okay"; gsc: gsc@20 { @@ -477,8 +480,11 @@ &i2c2 { clock-frequency = <400000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "okay"; pmic@4b { @@ -600,8 +606,11 @@ &i2c3 { clock-frequency = <400000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_gpio>; + scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "okay"; leds_gpio: gpio@20 { @@ -673,8 +682,11 @@ &i2c4 { clock-frequency = <400000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c4>; + pinctrl-1 = <&pinctrl_i2c4_gpio>; + scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "okay"; }; @@ -852,6 +864,13 @@ >; }; + pinctrl_i2c1_gpio: i2c1gpiogrp { + fsl,pins = < + MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14 0x400001c3 + MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15 0x400001c3 + >; + }; + pinctrl_i2c2: i2c2grp { fsl,pins = < MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 @@ -859,6 +878,13 @@ >; }; + pinctrl_i2c2_gpio: i2c2gpiogrp { + fsl,pins = < + MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16 0x400001c3 + MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17 0x400001c3 + >; + }; + pinctrl_i2c3: i2c3grp { fsl,pins = < MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 @@ -866,6 +892,13 @@ >; }; + pinctrl_i2c3_gpio: i2c3gpiogrp { + fsl,pins = < + MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18 0x400001c3 + MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19 0x400001c3 + >; + }; + pinctrl_i2c4: i2c4grp { fsl,pins = < MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 @@ -873,6 +906,13 @@ >; }; + pinctrl_i2c4_gpio: i2c4gpiogrp { + fsl,pins = < + MX8MM_IOMUXC_I2C4_SCL_GPIO5_IO20 0x400001c3 + MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21 0x400001c3 + >; + }; + pinctrl_ksz: kszgrp { fsl,pins = < MX8MM_IOMUXC_SAI1_TXD6_GPIO4_IO18 0x41 |