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authorTim Harvey <tharvey@gateworks.com>2022-04-13 19:02:44 +0300
committerStefano Babic <sbabic@denx.de>2022-04-21 13:44:23 +0300
commitd5cc234154d3909a71cf58f0b28697d75cdcfad9 (patch)
treeb1b0ee5cd9a59da4c224bbfaa737810c8af05325 /arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi
parentfb9ec33878aa72bdcd5c54be73fde1c33277fbab (diff)
downloadu-boot-d5cc234154d3909a71cf58f0b28697d75cdcfad9.tar.xz
arm: dts: imx8m*-venice: add gpio hog support
Add gpio hog support for board-specific gpio lines: - put hogs in u-boot.dtsi so as to keep the regular dts files in sync with the kernel. The hogs will not be put in the kernel as that makes them un-usable by userspace as well as re-initializes them to dt defaults overriding changes which may have been done by bootloader commands. - specify gpio names and initial config - enable GPIO_HOG Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi')
-rw-r--r--arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi108
1 files changed, 108 insertions, 0 deletions
diff --git a/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi b/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi
index b334b56b82..9431e2a6cd 100644
--- a/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi
@@ -5,6 +5,114 @@
#include "imx8mn-venice-u-boot.dtsi"
+&gpio1 {
+ m2rst {
+ gpio-hog;
+ output-low;
+ gpios = <13 GPIO_ACTIVE_HIGH>;
+ line-name = "m2_reset";
+ };
+
+ m2wdis {
+ gpio-hog;
+ output-high;
+ gpios = <15 GPIO_ACTIVE_HIGH>;
+ line-name = "m2_wdis#";
+ };
+};
+
+&gpio2 {
+ uart2en {
+ gpio-hog;
+ output-high;
+ gpios = <8 GPIO_ACTIVE_HIGH>;
+ line-name = "uart2_en#";
+ };
+};
+
+&gpio3 {
+ m2gdis {
+ gpio-hog;
+ output-high;
+ gpios = <1 GPIO_ACTIVE_HIGH>;
+ line-name = "m2_gdis#";
+ };
+
+ m2off {
+ gpio-hog;
+ output-high;
+ gpios = <7 GPIO_ACTIVE_HIGH>;
+ line-name = "m2_off#";
+ };
+};
+
+&gpio4 {
+ appgpio1 {
+ gpio-hog;
+ input;
+ gpios = <21 GPIO_ACTIVE_HIGH>;
+ line-name = "app_gpio1";
+ };
+
+ uart1rs485 {
+ gpio-hog;
+ output-low;
+ gpios = <23 GPIO_ACTIVE_HIGH>;
+ line-name = "uart1_rs485";
+ };
+
+ uart1term {
+ gpio-hog;
+ output-low;
+ gpios = <25 GPIO_ACTIVE_HIGH>;
+ line-name = "uart1_term";
+ };
+
+ uart1half {
+ gpio-hog;
+ output-low;
+ gpios = <26 GPIO_ACTIVE_HIGH>;
+ line-name = "uart1_half";
+ };
+
+ appgpio2 {
+ gpio-hog;
+ input;
+ gpios = <27 GPIO_ACTIVE_HIGH>;
+ line-name = "app_gpio2";
+ };
+
+ mipigpio1 {
+ gpio-hog;
+ input;
+ gpios = <28 GPIO_ACTIVE_HIGH>;
+ line-name = "mipi_gpio1";
+ };
+};
+
+&gpio5 {
+ mipigpio4 {
+ gpio-hog;
+ input;
+ gpios = <3 GPIO_ACTIVE_HIGH>;
+ line-name = "mipi_gpio4";
+ };
+
+ mipigpio3 {
+ gpio-hog;
+ input;
+ gpios = <4 GPIO_ACTIVE_HIGH>;
+ line-name = "mipi_gpio3";
+ };
+
+ mipigpio2 {
+ gpio-hog;
+ input;
+ gpios = <5 GPIO_ACTIVE_HIGH>;
+ line-name = "mipi_gpio2";
+ };
+};
+
&fec1 {
phy-reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
phy-reset-duration = <1>;