diff options
| author | Aswath Govindraju <a-govindraju@ti.com> | 2022-01-28 11:11:51 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-02-08 19:00:04 +0300 |
| commit | a94d70ad37fc3a7d618dabd7b2a7b5defa656f7c (patch) | |
| tree | 4ae7413d378919df18de4576666f9691271e45ab /arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi | |
| parent | 68c6476146339bc0a8724e0f6314a3b71a329598 (diff) | |
| download | u-boot-a94d70ad37fc3a7d618dabd7b2a7b5defa656f7c.tar.xz | |
arm: dts: k3-j721e: Add support for multilink PCIe + QSGMII
Add support for QSGMII multilink configuration.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Diffstat (limited to 'arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi')
| -rw-r--r-- | arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi index 938e978a6b..677a72d2a2 100644 --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi @@ -242,3 +242,8 @@ assigned-clocks = <&serdes0 CDNS_SIERRA_PLL_CMNLC>; assigned-clock-parents = <&wiz0_pll1_refclk>; }; + +&serdes0_qsgmii_link { + assigned-clocks = <&serdes0 CDNS_SIERRA_PLL_CMNLC1>; + assigned-clock-parents = <&wiz0_pll1_refclk>; +}; |