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| author | Neil Armstrong <narmstrong@baylibre.com> | 2017-10-12 16:50:30 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-11-17 15:43:32 +0300 |
| commit | 486221564920e8fcb9a58854a485dac1f8f4d1d3 (patch) | |
| tree | 3fbd8abaf4f26ef0e229d9a1c80f664be3b07bab /arch/arm/dts/meson-gxl-mali.dtsi | |
| parent | 9ecdf30cfee377b7a1e4c2de67f99e593bbfa24a (diff) | |
| download | u-boot-486221564920e8fcb9a58854a485dac1f8f4d1d3.tar.xz | |
ARM: dts: Synchronize Amlogic from Linux Mainline 4.13.5
Synchronize the Amlogic ARM64 dts from mainline Linux 4.13.5
In the preparation of the support of the Amlogic P212 board,
import the corresponding meson-gxl-s905x-p212.dts file.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Beniamino Galvani <b.galvani@gmail.com>
Diffstat (limited to 'arch/arm/dts/meson-gxl-mali.dtsi')
| -rw-r--r-- | arch/arm/dts/meson-gxl-mali.dtsi | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm/dts/meson-gxl-mali.dtsi b/arch/arm/dts/meson-gxl-mali.dtsi new file mode 100644 index 0000000000..f06cc23469 --- /dev/null +++ b/arch/arm/dts/meson-gxl-mali.dtsi @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2017 BayLibre SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +&apb { + mali: gpu@c0000 { + compatible = "amlogic,meson-gxbb-mali", "arm,mali-450"; + reg = <0x0 0xc0000 0x0 0x40000>; + interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "gp", "gpmmu", "pp", "pmu", + "pp0", "ppmmu0", "pp1", "ppmmu1", + "pp2", "ppmmu2"; + clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; + clock-names = "bus", "core"; + + /* + * Mali clocking is provided by two identical clock paths + * MALI_0 and MALI_1 muxed to a single clock by a glitch + * free mux to safely change frequency while running. + */ + assigned-clocks = <&clkc CLKID_MALI_0_SEL>, + <&clkc CLKID_MALI_0>, + <&clkc CLKID_MALI>; /* Glitch free mux */ + assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, + <0>, /* Do Nothing */ + <&clkc CLKID_MALI_0>; + assigned-clock-rates = <0>, /* Do Nothing */ + <666666666>, + <0>; /* Do Nothing */ + }; +}; |