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author | Tom Rini <trini@konsulko.com> | 2023-02-28 01:28:21 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2023-02-28 01:28:21 +0300 |
commit | 5b197eee334bdf75cc9e9148161299679a5251ea (patch) | |
tree | edec3c21a01fb54d764d04caa2bd774823e76c2d /arch/arm/dts/socfpga_arria10_chameleonv3.dtsi | |
parent | 7a826ded4a0e409d73ff4a910685821d34f1b664 (diff) | |
parent | e8c80ac0f7a13bf0fc016ce324b870c0cff7a2b8 (diff) | |
download | u-boot-5b197eee334bdf75cc9e9148161299679a5251ea.tar.xz |
Merge tag 'v2023.04-rc3' into next
Prepare v2023.04-rc3
Diffstat (limited to 'arch/arm/dts/socfpga_arria10_chameleonv3.dtsi')
-rw-r--r-- | arch/arm/dts/socfpga_arria10_chameleonv3.dtsi | 90 |
1 files changed, 90 insertions, 0 deletions
diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3.dtsi b/arch/arm/dts/socfpga_arria10_chameleonv3.dtsi new file mode 100644 index 0000000000..988cc44543 --- /dev/null +++ b/arch/arm/dts/socfpga_arria10_chameleonv3.dtsi @@ -0,0 +1,90 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2022 Google LLC + */ +/dts-v1/; +#include "socfpga_arria10_mercury_aa1.dtsi" + +/ { + model = "Google Chameleon V3"; + compatible = "google,chameleon-v3", + "altr,socfpga-arria10", "altr,socfpga"; + + aliases { + serial0 = &uart0; + i2c0 = &i2c0; + i2c1 = &i2c1; + }; +}; + +&gmac0 { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&gpio2 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + ssm2603: ssm2603@1a { + compatible = "adi,ssm2603"; + reg = <0x1a>; + }; +}; + +&i2c1 { + status = "okay"; + + u80: u80@21 { + compatible = "nxp,pca9535"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = + "SOM_AUD_MUTE", + "DP1_OUT_CEC_EN", + "DP2_OUT_CEC_EN", + "DP1_SOM_PS8469_CAD", + "DPD_SOM_PS8469_CAD", + "DP_OUT_PWR_EN", + "STM32_RST_L", + "STM32_BOOT0", + + "FPGA_PROT", + "STM32_FPGA_COMM0", + "TP119", + "TP120", + "TP121", + "TP122", + "TP123", + "TP124"; + }; +}; + +&mmc { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&usb0 { + status = "okay"; + dr_mode = "host"; +}; |