summaryrefslogtreecommitdiff
path: root/arch/arm/dts/socfpga_cyclone5_vining_fpga.dts
diff options
context:
space:
mode:
authorJames Byrne <james.byrne@origamienergy.com>2019-03-04 20:40:33 +0300
committerJoe Hershberger <joe.hershberger@ni.com>2019-05-09 01:27:01 +0300
commit83f71ef55866d77c8e84c99d4c06c55836b7820a (patch)
tree2080d47ed5c3eb90373591ba10175a50ffed8c1a /arch/arm/dts/socfpga_cyclone5_vining_fpga.dts
parentc940646ed11ed6580a2b7749d05c873e39ad7f42 (diff)
downloadu-boot-83f71ef55866d77c8e84c99d4c06c55836b7820a.tar.xz
net: phy: micrel: Use correct skew values on KSZ9021
Commit ff7bd212cb8a ("net: phy: micrel: fix divisor value for KSZ9031 phy skew") fixed the skew value divisor for the KSZ9031, but left the code using the same divisor for the KSZ9021, which is incorrect. The preceding commit c16e69f702b1 ("net: phy: micrel: add documentation for Micrel KSZ90x1 binding") added the DTS documentation for the KSZ90x1, changing it from the equivalent file in the Linux kernel to correctly state that for this part the skew value is set in 120ps steps, whereas the Linux documentation and driver continue to this day to use the incorrect value of 200 that came from the original KSZ9021 datasheet before it was corrected in revision 1.2 (Feb 2014). This commit sorts out the resulting confusion in a consistent way by making the following changes: - Update the documentation to be clear about what the skew values mean, in the same was as for the KSZ9031. - Update the Micrel PHY driver to select the appropriate divisor for both parts. - Adjust all the device trees that state skew values for KSZ9021 PHYs to use values based on 120ps steps instead of 200ps steps. This will result in the same values being programmed into the skew registers as the equivalent device trees in the Linux kernel do, where it incorrectly uses 200ps steps (since that's where all these device trees were copied from). Signed-off-by: James Byrne <james.byrne@origamienergy.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Diffstat (limited to 'arch/arm/dts/socfpga_cyclone5_vining_fpga.dts')
-rw-r--r--arch/arm/dts/socfpga_cyclone5_vining_fpga.dts4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/dts/socfpga_cyclone5_vining_fpga.dts b/arch/arm/dts/socfpga_cyclone5_vining_fpga.dts
index 355b3dbf43..ac57f41cb5 100644
--- a/arch/arm/dts/socfpga_cyclone5_vining_fpga.dts
+++ b/arch/arm/dts/socfpga_cyclone5_vining_fpga.dts
@@ -85,9 +85,9 @@
rxd2-skew-ps = <0>;
rxd3-skew-ps = <0>;
txen-skew-ps = <0>;
- txc-skew-ps = <2600>;
+ txc-skew-ps = <1560>;
rxdv-skew-ps = <0>;
- rxc-skew-ps = <2000>;
+ rxc-skew-ps = <1200>;
};
};
};