summaryrefslogtreecommitdiff
path: root/arch/arm/dts/socfpga_stratix10.dtsi
diff options
context:
space:
mode:
authorLey Foon Tan <ley.foon.tan@intel.com>2019-04-03 08:45:02 +0300
committerMarek Vasut <marex@denx.de>2019-04-17 23:20:17 +0300
commit2c494e62c31a34746d88511e075aa187ac3f7d10 (patch)
tree412584eba3f3f4fa7e02c328e9fe23035c12b45d /arch/arm/dts/socfpga_stratix10.dtsi
parent456d45261bc6abee1ffedd0f9cbd35aada5c0ff3 (diff)
downloadu-boot-2c494e62c31a34746d88511e075aa187ac3f7d10.tar.xz
arm: dts: Stratix10: Add QSPI node
Merge qspi dts node from Linux. Commit 0cb140d07fc75fb (arm64: dts: stratix10: Add QSPI support for Stratix10) Add -u-boot.dtsi files for non Linux dts properties and update properties for Uboot. - add u-boot,dm-pre-reloc - add alias for spi0 - change compatible for flash - support quad read and quad write - change maximum frequency to 100MHz Tested on Stratix 10 SoC devkit. SOCFPGA_STRATIX10 # sf probe 0:0 SF: Detected mt25qu02g with page size 256 Bytes, erase size 64 KiB, total 256 MiB Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'arch/arm/dts/socfpga_stratix10.dtsi')
-rwxr-xr-x[-rw-r--r--]arch/arm/dts/socfpga_stratix10.dtsi13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/dts/socfpga_stratix10.dtsi b/arch/arm/dts/socfpga_stratix10.dtsi
index ee93725d64..d1ae2fabae 100644..100755
--- a/arch/arm/dts/socfpga_stratix10.dtsi
+++ b/arch/arm/dts/socfpga_stratix10.dtsi
@@ -237,6 +237,19 @@
reg = <0xffe00000 0x100000>;
};
+ qspi: spi@ff8d2000 {
+ compatible = "cdns,qspi-nor";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xff8d2000 0x100>,
+ <0xff900000 0x100000>;
+ interrupts = <0 3 4>;
+ cdns,fifo-depth = <128>;
+ cdns,fifo-width = <4>;
+ cdns,trigger-address = <0x00000000>;
+ status = "disabled";
+ };
+
rst: rstmgr@ffd11000 {
#reset-cells = <1>;
compatible = "altr,rst-mgr";