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| author | Jagan Teki <jagan@amarulasolutions.com> | 2018-08-04 22:10:11 +0300 |
|---|---|---|
| committer | Jagan Teki <jagan@amarulasolutions.com> | 2018-09-28 19:39:24 +0300 |
| commit | 9ad93c0c968c8e6cd1273b73c44ec7262c616408 (patch) | |
| tree | fbf5ba73c82d359e5bb83ad25f12a0960a840f7c /arch/arm/dts/sun8i-a33.dtsi | |
| parent | b9d59d08a6c7362a9558dd5f67cdf85cc3a1b7c8 (diff) | |
| download | u-boot-9ad93c0c968c8e6cd1273b73c44ec7262c616408.tar.xz | |
ARM: dts: sun8i: Update A23/A33/r16 dts(i) files from Linux-v4.18-rc3
Update all A23/A33/r16 devicetree dtsi and dtsi files from
Linux-v4.18-rc3 with below commits.
A23:
commit bc3bd041fe766219a44688b182c260064007f0cc
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date: Tue Apr 24 17:55:02 2018 +0200
ARM: dts: sun8i: a23/a33: declare NAND pins
A33:
commit 88fe315d2c0a397ef42d7639addab0e021ae911d
Author: Maxime Ripard <maxime.ripard@bootlin.com>
Date: Wed Apr 4 11:57:15 2018 +0200
ARM: dts: sun8i: a33: Add the DSI-related nodes
r16:
commit 9621d0bd1b0d61167e1853ac68cf4869c31bcc96
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date: Tue Apr 24 17:55:03 2018 +0200
ARM: dts: nes: add Nintendo NES/SuperNES Classic Edition support
Note:
- Drop pinctrl from sun8i-r16-nintendo-nes-classic-edition.dts since
sun8i-a23-a33.dtsi is added with Linux sync.
- Don't sync non U-Boot supported dts files
sun8i-a23-ippo-q8h-v1.2.dts
sun8i-a23-ippo-q8h-v5.dts
sun8i-a33-et-q8-v1.6.dts
sun8i-a33-ippo-q8h-v1.2.dts
sun8i-r16-nintendo-nes-classic.dts
sun8i-r16-nintendo-super-nes-classic.dts
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'arch/arm/dts/sun8i-a33.dtsi')
| -rw-r--r-- | arch/arm/dts/sun8i-a33.dtsi | 63 |
1 files changed, 53 insertions, 10 deletions
diff --git a/arch/arm/dts/sun8i-a33.dtsi b/arch/arm/dts/sun8i-a33.dtsi index 22660919bd..8d278ee001 100644 --- a/arch/arm/dts/sun8i-a33.dtsi +++ b/arch/arm/dts/sun8i-a33.dtsi @@ -203,8 +203,8 @@ }; }; - soc@01c00000 { - tcon0: lcd-controller@01c0c000 { + soc@1c00000 { + tcon0: lcd-controller@1c0c000 { compatible = "allwinner,sun8i-a33-tcon"; reg = <0x01c0c000 0x1000>; interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; @@ -236,11 +236,16 @@ #address-cells = <1>; #size-cells = <0>; reg = <1>; + + tcon0_out_dsi: endpoint@1 { + reg = <1>; + remote-endpoint = <&dsi_in_tcon0>; + }; }; }; }; - crypto: crypto-engine@01c15000 { + crypto: crypto-engine@1c15000 { compatible = "allwinner,sun4i-a10-crypto"; reg = <0x01c15000 0x1000>; interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; @@ -250,7 +255,7 @@ reset-names = "ahb"; }; - dai: dai@01c22c00 { + dai: dai@1c22c00 { #sound-dai-cells = <0>; compatible = "allwinner,sun6i-a31-i2s"; reg = <0x01c22c00 0x200>; @@ -263,7 +268,7 @@ status = "disabled"; }; - codec: codec@01c22e00 { + codec: codec@1c22e00 { #sound-dai-cells = <0>; compatible = "allwinner,sun8i-a33-codec"; reg = <0x01c22e00 0x400>; @@ -273,14 +278,53 @@ status = "disabled"; }; - ths: ths@01c25000 { + ths: ths@1c25000 { compatible = "allwinner,sun8i-a33-ths"; reg = <0x01c25000 0x100>; #thermal-sensor-cells = <0>; #io-channel-cells = <0>; }; - fe0: display-frontend@01e00000 { + dsi: dsi@1ca0000 { + compatible = "allwinner,sun6i-a31-mipi-dsi"; + reg = <0x01ca0000 0x1000>; + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_MIPI_DSI>, + <&ccu CLK_DSI_SCLK>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_MIPI_DSI>; + phys = <&dphy>; + phy-names = "dphy"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + dsi_in_tcon0: endpoint { + remote-endpoint = <&tcon0_out_dsi>; + }; + }; + }; + }; + + dphy: d-phy@1ca1000 { + compatible = "allwinner,sun6i-a31-mipi-dphy"; + reg = <0x01ca1000 0x1000>; + clocks = <&ccu CLK_BUS_MIPI_DSI>, + <&ccu CLK_DSI_DPHY>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_MIPI_DSI>; + status = "disabled"; + #phy-cells = <0>; + }; + + fe0: display-frontend@1e00000 { compatible = "allwinner,sun8i-a33-display-frontend"; reg = <0x01e00000 0x20000>; interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; @@ -289,7 +333,6 @@ clock-names = "ahb", "mod", "ram"; resets = <&ccu RST_BUS_DE_FE>; - status = "disabled"; ports { #address-cells = <1>; @@ -308,7 +351,7 @@ }; }; - be0: display-backend@01e60000 { + be0: display-backend@1e60000 { compatible = "allwinner,sun8i-a33-display-backend"; reg = <0x01e60000 0x10000>, <0x01e80000 0x1000>; reg-names = "be", "sat"; @@ -350,7 +393,7 @@ }; }; - drc0: drc@01e70000 { + drc0: drc@1e70000 { compatible = "allwinner,sun8i-a33-drc"; reg = <0x01e70000 0x10000>; interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; |