diff options
| author | Michal Simek <michal.simek@amd.com> | 2022-09-09 14:05:48 +0300 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2022-09-21 10:55:19 +0300 |
| commit | 13622c7a9dfabb2dd07e8c125243f47540673ba9 (patch) | |
| tree | a9f3f0342ebf30b0e6e3955fcc89a5c81e527ede /arch/arm/dts/zynqmp-zcu208-revA.dts | |
| parent | 0fb7fd865b1ac0ab4c0546f53484530d866a030b (diff) | |
| download | u-boot-13622c7a9dfabb2dd07e8c125243f47540673ba9.tar.xz | |
arm64: zynqmp: Describe TI phy as ethernet-phy-id
TI DP83867 is using strapping based on MIO pins. Tristate setup can influce
PHY address. That's why switch description with ethernet-phy-id compatible
string which enable calling reset. PHY itself setups phy address after
power up or reset. Reset description will be added in separate commit.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/52bf9ac0453d4e4896d8edd2618e684bb1ff6012.1662721547.git.michal.simek@amd.com
Diffstat (limited to 'arch/arm/dts/zynqmp-zcu208-revA.dts')
| -rw-r--r-- | arch/arm/dts/zynqmp-zcu208-revA.dts | 18 |
1 files changed, 12 insertions, 6 deletions
diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts index c5cdd58af6..3e8ee429eb 100644 --- a/arch/arm/dts/zynqmp-zcu208-revA.dts +++ b/arch/arm/dts/zynqmp-zcu208-revA.dts @@ -169,12 +169,18 @@ status = "okay"; phy-handle = <&phy0>; phy-mode = "rgmii-id"; - phy0: ethernet-phy@c { - reg = <0xc>; - ti,rx-internal-delay = <0x8>; - ti,tx-internal-delay = <0xa>; - ti,fifo-depth = <0x1>; - ti,dp83867-rxctrl-strap-quirk; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: ethernet-phy@c { + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <0xc>; + ti,rx-internal-delay = <0x8>; + ti,tx-internal-delay = <0xa>; + ti,fifo-depth = <0x1>; + ti,dp83867-rxctrl-strap-quirk; + }; }; }; |