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authorChia-Wei Wang <chiawei_wang@aspeedtech.com>2022-06-01 11:43:52 +0300
committerTom Rini <trini@konsulko.com>2022-06-23 04:30:05 +0300
commit12770d0df0e841cfa1bdbde7636aad3d531bf66b (patch)
tree363b6e9aa64f183b669ea0e30a2178aab4d3182e /arch/arm/include/asm/arch-aspeed
parent442a69c143759648f571e3784c7b3bc5be7ed595 (diff)
downloadu-boot-12770d0df0e841cfa1bdbde7636aad3d531bf66b.tar.xz
ast2600: spl: Add boot mode detection
AST2600 supports boot from SPI(mmap), eMMC, and UART. This patch adds the boot mode detection and return the corresponding boot device type. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Diffstat (limited to 'arch/arm/include/asm/arch-aspeed')
-rw-r--r--arch/arm/include/asm/arch-aspeed/scu_ast2600.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2600.h b/arch/arm/include/asm/arch-aspeed/scu_ast2600.h
index 7c5aab98b6..251bfa269b 100644
--- a/arch/arm/include/asm/arch-aspeed/scu_ast2600.h
+++ b/arch/arm/include/asm/arch-aspeed/scu_ast2600.h
@@ -87,6 +87,9 @@
#define SCU_HWSTRAP1_CPU_FREQ_SHIFT 8
#define SCU_HWSTRAP1_MAC2_INTF BIT(7)
#define SCU_HWSTRAP1_MAC1_INTF BIT(6)
+#define SCU_HWSTRAP1_BOOT_EMMC BIT(2)
+
+#define SCU_HWSTRAP2_BOOT_UART BIT(8)
#define SCU_EFUSE_DIS_DP BIT(17)
#define SCU_EFUSE_DIS_VGA BIT(14)