diff options
| author | Tom Rini <trini@konsulko.com> | 2022-08-01 04:08:24 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-08-12 23:10:49 +0300 |
| commit | 8b549c0b23619afbc9b8d26379710ecb937e20e2 (patch) | |
| tree | d422e61b543b5f06d6fce3580acbc1a37f19a604 /arch/arm/include/asm/arch-fsl-layerscape | |
| parent | 83505a7e9f8dd3e483d58f0519064bfac84e40a2 (diff) | |
| download | u-boot-8b549c0b23619afbc9b8d26379710ecb937e20e2.tar.xz | |
Remove CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR et al
This removes the following symbols:
CONFIG_SYS_FSL_DSPI_BE
CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR
CONFIG_SYS_FSL_DSP_CCSR_DDR_OFFSET
CONFIG_SYS_FSL_DSP_DDR_ADDR
CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
CONFIG_SYS_FSL_ERRATUM_A008751
CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
CONFIG_SYS_FSL_ESDHC_NUM
CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
CONFIG_SYS_FSL_FM1_RX0_1G_OFFSET
CONFIG_SYS_FSL_FM1_RX1_1G_OFFSET
CONFIG_SYS_FSL_FM1_RX2_1G_OFFSET
CONFIG_SYS_FSL_FM1_RX3_1G_OFFSET
CONFIG_SYS_FSL_FM1_RX4_1G_OFFSET
CONFIG_SYS_FSL_FM1_RX5_1G_OFFSET
CONFIG_SYS_FSL_ISBC_VER
CONFIG_SYS_FSL_QSPI_LE
CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR
CONFIG_SYS_FSL_SCFG_IODSECR1_OFFSET
CONFIG_SYS_FSL_SCFG_PIXCLKCR_OFFSET
CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR
CONFIG_SYS_FSL_SRDS_NUM_PLLS
CONFIG_SYS_FSL_WDOG_BE
CONFIG_SYS_GP1DIR
CONFIG_SYS_GP1ODR
CONFIG_SYS_GP2DIR
CONFIG_SYS_GP2ODR
CONFIG_SYS_HALT_BEFOR_RAM_JUMP
CONFIG_SYS_HMI_BASE
FSL_QSPI_FLASH_NUM
FSL_QSPI_FLASH_SIZE
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/include/asm/arch-fsl-layerscape')
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/config.h | 5 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 6 |
2 files changed, 0 insertions, 11 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 1791b97870..587d585412 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -94,8 +94,6 @@ #define EPU_EPCTR5 0x700060a14ULL #define EPU_EPGCR 0x700060000ULL -#define CONFIG_SYS_FSL_ERRATUM_A008751 - #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 #elif defined(CONFIG_ARCH_LS1088A) @@ -218,9 +216,6 @@ #define DCSR_DCFG_SBEESR2 0x20140534 #define DCSR_DCFG_MBEESR2 0x20140544 -#define CONFIG_SYS_FSL_WDOG_BE -#define CONFIG_SYS_FSL_DSPI_BE - /* SoC related */ #ifdef CONFIG_ARCH_LS1043A #define CONFIG_SYS_FSL_QMAN_V3 diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index f2dbcdc816..1fb1191a65 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -166,12 +166,6 @@ struct sys_info { }; #define CONFIG_SYS_FSL_FM1_OFFSET 0xa00000 -#define CONFIG_SYS_FSL_FM1_RX0_1G_OFFSET 0xa88000 -#define CONFIG_SYS_FSL_FM1_RX1_1G_OFFSET 0xa89000 -#define CONFIG_SYS_FSL_FM1_RX2_1G_OFFSET 0xa8a000 -#define CONFIG_SYS_FSL_FM1_RX3_1G_OFFSET 0xa8b000 -#define CONFIG_SYS_FSL_FM1_RX4_1G_OFFSET 0xa8c000 -#define CONFIG_SYS_FSL_FM1_RX5_1G_OFFSET 0xa8d000 #define CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET 0xae0000 #define CONFIG_SYS_FSL_FM1_ADDR \ |