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| author | Tom Rini <trini@konsulko.com> | 2022-08-01 04:08:26 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-08-12 23:10:49 +0300 |
| commit | c6eec0182a9823e6238f34bd177f27330b0ad52d (patch) | |
| tree | 90afbe9111838971a2dde0204ba264b5dc3017b7 /arch/arm/include/asm/arch-fsl-layerscape | |
| parent | 7ae1e6a3a39471fd9bed6b94e887747d8719b87a (diff) | |
| download | u-boot-c6eec0182a9823e6238f34bd177f27330b0ad52d.tar.xz | |
Convert CONFIG_SYS_FSL_MAX_NUM_OF_SEC to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_FSL_MAX_NUM_OF_SEC
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/include/asm/arch-fsl-layerscape')
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/config.h | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 587d585412..1b108dde53 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -94,8 +94,6 @@ #define EPU_EPCTR5 0x700060a14ULL #define EPU_EPGCR 0x700060000ULL -#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 - #elif defined(CONFIG_ARCH_LS1088A) #define CONFIG_SYS_FSL_NUM_CC_PLLS 3 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1 } @@ -129,7 +127,6 @@ #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE /* DCFG - GUR */ -#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 #define CONFIG_SYS_FSL_OCRAM_BASE 0x18000000 /* initial RAM */ #define SYS_FSL_OCRAM_SPACE_SIZE 0x00200000 /* 2M space */ #define CONFIG_SYS_FSL_OCRAM_SIZE 0x00020000 /* Real size 128K */ @@ -165,8 +162,6 @@ /* DCFG - GUR */ -#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 - #elif defined(CONFIG_ARCH_LS1028A) #define CONFIG_SYS_FSL_NUM_CC_PLLS 3 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1 } @@ -204,7 +199,6 @@ #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE /* SEC */ -#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 /* DCFG - GUR */ @@ -258,12 +252,9 @@ #define GIC_ADDR_BIT 31 #define SCFG_GIC400_ALIGN 0x1570188 -#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 - #elif defined(CONFIG_ARCH_LS1012A) #define GICD_BASE 0x01401000 #define GICC_BASE 0x01402000 -#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 #define CONFIG_SYS_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE @@ -281,8 +272,6 @@ /* Generic Interrupt Controller Definitions */ #define GICD_BASE 0x01410000 #define GICC_BASE 0x01420000 - -#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 #else #error SoC not defined #endif |