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authorMarek Vasut <marex@denx.de>2022-12-22 03:46:41 +0300
committerStefano Babic <sbabic@denx.de>2023-01-31 17:46:40 +0300
commit191937134b939718015de57dfda7355f4dfe4248 (patch)
treed0e342af90b36ba839bc1c75c3e85df193b531de /arch/arm/include/asm/arch-imx8m
parent1434f93ee016e55473031e47b84f9fe6f2e26b56 (diff)
downloadu-boot-191937134b939718015de57dfda7355f4dfe4248.tar.xz
arm: imx: imx8m: Define trampoline location if PSCI provider
The common code used to bring up secondary cores requires a final jump location to be stored in some sort of memory location, define this memory location to be the start of OCRAM, since it is available. Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'arch/arm/include/asm/arch-imx8m')
-rw-r--r--arch/arm/include/asm/arch-imx8m/imx-regs.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h
index cfd5479cd7..3034d280cc 100644
--- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
@@ -91,6 +91,10 @@
#define IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK 0x70000
#define FEC_QUIRK_ENET_MAC
+#ifdef CONFIG_ARMV8_PSCI /* Final jump location */
+#define CPU_RELEASE_ADDR 0x900000
+#endif
+
#define CAAM_ARB_BASE_ADDR (0x00100000)
#define CAAM_ARB_END_ADDR (0x00107FFF)
#define CAAM_IPS_BASE_ADDR (0x30900000)