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authorJernej Skrabec <jernej.skrabec@gmail.com>2022-01-30 17:27:13 +0300
committerAndre Przywara <andre.przywara@arm.com>2022-04-05 01:24:17 +0300
commit1772771ac00150c474a0936f675dc553f44be549 (patch)
treea9eb67f44c127faf83bf4f0fbd6de3ed7168e059 /arch/arm/include/asm/arch-sunxi
parent482c1ccd1ce450f8c56a891f4067a6db8fb499fd (diff)
downloadu-boot-1772771ac00150c474a0936f675dc553f44be549.tar.xz
sunxi: prcm: Add a few registers
H6 and H616 SPL code has a few writes to unknown PRCM registers. Now that we know what they are, let's replace magic offsets with proper register names. Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'arch/arm/include/asm/arch-sunxi')
-rw-r--r--arch/arm/include/asm/arch-sunxi/prcm_sun50i.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/prcm_sun50i.h b/arch/arm/include/asm/arch-sunxi/prcm_sun50i.h
index 5f636e8384..fd63d3aad8 100644
--- a/arch/arm/include/asm/arch-sunxi/prcm_sun50i.h
+++ b/arch/arm/include/asm/arch-sunxi/prcm_sun50i.h
@@ -37,8 +37,18 @@ struct sunxi_prcm_reg {
u32 w1_gate_reset; /* 0x1ec */
u8 res10[0x1c]; /* 0x1f0 */
u32 rtc_gate_reset; /* 0x20c */
+ u8 res11[0x34]; /* 0x210 */
+ u32 pll_ldo_cfg; /* 0x244 */
+ u8 res12[0x8]; /* 0x248 */
+ u32 sys_pwroff_gating; /* 0x250 */
+ u8 res13[0xbc]; /* 0x254 */
+ u32 res_cal_ctrl; /* 0x310 */
+ u32 ohms200; /* 0x314 */
+ u32 ohms240; /* 0x318 */
+ u32 res_cal_status; /* 0x31c */
};
check_member(sunxi_prcm_reg, rtc_gate_reset, 0x20c);
+check_member(sunxi_prcm_reg, res_cal_status, 0x31c);
#define PRCM_TWI_GATE (1 << 0)
#define PRCM_TWI_RESET (1 << 16)