diff options
| author | Tom Rini <trini@konsulko.com> | 2021-09-03 17:40:28 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-09-03 17:42:15 +0300 |
| commit | 00179319714fd2076cf81f49de357ee699672f31 (patch) | |
| tree | 995c59d4b9b004e506b6e644b866c73f71b502ff /arch/arm/include/asm/system.h | |
| parent | b35be5ed42c8453ac95432b6fbc0d42b1e91c758 (diff) | |
| download | u-boot-00179319714fd2076cf81f49de357ee699672f31.tar.xz | |
Revert most of the series for adding vexpress_aemv8r support
Per a request from Andre Przywara and agreed with by Peter Hoyes, the
vexpress aemv8r support wasn't quite ready to be merged, but the
discussion had moved off list. We should keep the first patch in the
series for now, but revert the rest. This reverts the following
commits:
e0bd6f31ce41 doc: Add documentation for the Arm vexpress board configs
30e5a449e8c7 arm: Use armv8_switch_to_el1 env to switch to EL1
b53bbca63bf4 vexpress64: Add BASER_FVP vexpress board variant
2f5b7b74903f armv8: Add ARMv8 MPU configuration logic
37a757e227cc armv8: Ensure EL1&0 VMSA is enabled
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/include/asm/system.h')
| -rw-r--r-- | arch/arm/include/asm/system.h | 24 |
1 files changed, 0 insertions, 24 deletions
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 1ec6237320..f75eea16b3 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -84,30 +84,6 @@ #define HCR_EL2_HCD_DIS (1 << 29) /* Hypervisor Call disabled */ /* - * VTCR_EL2 bits definitions - */ -#define VTCR_EL2_MSA (1 << 31) /* EL1&0 memory architecture */ - -/* - * ID_AA64MMFR0_EL1 bits definitions - */ -#define ID_AA64MMFR0_EL1_MSA_FRAC_MASK (0xFUL << 52) /* Memory system - architecture - frac */ -#define ID_AA64MMFR0_EL1_MSA_FRAC_VMSA (0x2UL << 52) /* EL1&0 supports - VMSA */ -#define ID_AA64MMFR0_EL1_MSA_FRAC_PMSA (0x1UL << 52) /* EL1&0 only - supports PMSA*/ -#define ID_AA64MMFR0_EL1_MSA_FRAC_NO_PMSA (0x0UL << 52) /* No PMSA - support */ -#define ID_AA64MMFR0_EL1_MSA_MASK (0xFUL << 48) /* Memory system - architecture */ -#define ID_AA64MMFR0_EL1_MSA_USE_FRAC (0xFUL << 48) /* Use MSA_FRAC */ -#define ID_AA64MMFR0_EL1_MSA_VMSA (0x0UL << 48) /* Memory system - architecture - is VMSA */ - -/* * ID_AA64ISAR1_EL1 bits definitions */ #define ID_AA64ISAR1_EL1_GPI (0xF << 28) /* Implementation-defined generic |