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| author | Ye Li <ye.li@nxp.com> | 2021-08-07 11:00:55 +0300 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2021-08-09 15:46:51 +0300 |
| commit | ba472a209b0086cb6e1e573a5e36f0d8ca912b50 (patch) | |
| tree | c3e4030bc5898fdcb267e4811891a5f0111738ff /arch/arm/include | |
| parent | 26b53212b8f207243e5621d6e121bac559c59678 (diff) | |
| download | u-boot-ba472a209b0086cb6e1e573a5e36f0d8ca912b50.tar.xz | |
arm: imx8ulp: release and configure XRDC at early phase
Since S400 will set the memory of SPL image to R/X. We can't write
to any data in SPL image.
1. Set the parameters save/restore only for u-boot, not for SPL. to
avoid write data.
2. Not use MU DM driver but directly call MU API to send release XRDC
to S400 at early phase.
3. Configure the SPL image memory of SRAM2 to writable (R/W/X)
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/arch-imx8ulp/mu_hal.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-imx8ulp/mu_hal.h b/arch/arm/include/asm/arch-imx8ulp/mu_hal.h new file mode 100644 index 0000000000..10d966d5d4 --- /dev/null +++ b/arch/arm/include/asm/arch-imx8ulp/mu_hal.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2021 NXP + */ + +#ifndef __IMX8ULP_MU_HAL_H__ +#define __IMX8ULP_MU_HAL_H__ + +void mu_hal_init(ulong base); +int mu_hal_sendmsg(ulong base, u32 reg_index, u32 msg); +int mu_hal_receivemsg(ulong base, u32 reg_index, u32 *msg); +#endif |