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author | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | 2020-09-09 20:07:26 +0300 |
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committer | Michal Simek <michal.simek@xilinx.com> | 2020-09-22 13:47:28 +0300 |
commit | 28c851f12847096dbe7a4e480d1092630cd01936 (patch) | |
tree | 1202f680cebf8c853ac96789a1256b5c55d22476 /arch/arm/lib | |
parent | 04d13b5d09c17a076260e2b9fb92c0d708d37264 (diff) | |
download | u-boot-28c851f12847096dbe7a4e480d1092630cd01936.tar.xz |
arm64: Add support for larger PIE U-Boot
Linking a U-Boot larger than 1MB fails with PIE enabled:
u-boot/arch/arm/cpu/armv8/start.S:71:(.text+0x3c): relocation
truncated to fit: R_AARCH64_ADR_PREL_LO21 against symbol `__rel_dyn_end'
defined in .bss_start section in u-boot.
This extends the supported range by using adrp & add to load symbols
early while starting up.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/lib')
-rw-r--r-- | arch/arm/lib/crt0_64.S | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S index 04afa518ac..9d2319c0e8 100644 --- a/arch/arm/lib/crt0_64.S +++ b/arch/arm/lib/crt0_64.S @@ -73,7 +73,12 @@ ENTRY(_main) #elif defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK) ldr x0, =(CONFIG_SPL_STACK) #elif defined(CONFIG_INIT_SP_RELATIVE) +#if CONFIG_POSITION_INDEPENDENT + adrp x0, __bss_start /* x0 <- Runtime &__bss_start */ + add x0, x0, #:lo12:__bss_start +#else adr x0, __bss_start +#endif add x0, x0, #CONFIG_SYS_INIT_SP_BSS_OFFSET #else ldr x0, =(CONFIG_SYS_INIT_SP_ADDR) @@ -102,7 +107,8 @@ ENTRY(_main) adr lr, relocation_return #if CONFIG_POSITION_INDEPENDENT /* Add in link-vs-runtime offset */ - adr x0, _start /* x0 <- Runtime value of _start */ + adrp x0, _start /* x0 <- Runtime value of _start */ + add x0, x0, #:lo12:_start ldr x9, _TEXT_BASE /* x9 <- Linked value of _start */ sub x9, x9, x0 /* x9 <- Run-vs-link offset */ add lr, lr, x9 |