ARM: mach-at91: add support for new SoC sama7g5

Add support for new SoC sama7g5

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>

5 files changed, 92 insertions, 0 deletions

diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 85524004f9..be1415f909 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -47,6 +47,10 @@ config SAM9X60
 	bool
 	select CPU_ARM926EJS
 
+config SAMA7G5
+	bool
+	select CPU_V7A
+
 config SAMA5D2
 	bool
 	select CPU_V7A
diff --git a/arch/arm/mach-at91/armv7/Makefile b/arch/arm/mach-at91/armv7/Makefile
index 9ced3dc0c1..55477560a8 100644
--- a/arch/arm/mach-at91/armv7/Makefile
+++ b/arch/arm/mach-at91/armv7/Makefile
@@ -9,6 +9,7 @@
 obj-$(CONFIG_SAMA5D2)	+= sama5d2_devices.o
 obj-$(CONFIG_SAMA5D3)	+= sama5d3_devices.o
 obj-$(CONFIG_SAMA5D4)	+= sama5d4_devices.o
+obj-$(CONFIG_SAMA7G5)	+= sama7g5_devices.o
 obj-y += clock.o
 obj-y += cpu.o
 obj-y += reset.o
diff --git a/arch/arm/mach-at91/armv7/sama7g5_devices.c b/arch/arm/mach-at91/armv7/sama7g5_devices.c
new file mode 100644
index 0000000000..a58f671f72
--- /dev/null
+++ b/arch/arm/mach-at91/armv7/sama7g5_devices.c
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Microchip Technology, Inc.
+ *		      Eugen Hristev <eugen.hristev@microchip.com>
+ */
+
+char *get_cpu_name(void)
+{
+	return "SAMA7G5";
+}
+
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
index 88acca8549..0a16c8ff08 100644
--- a/arch/arm/mach-at91/include/mach/hardware.h
+++ b/arch/arm/mach-at91/include/mach/hardware.h
@@ -24,6 +24,8 @@
 # include <asm/arch/at91sam9x5.h>
 #elif defined(CONFIG_SAM9X60)
 # include <asm/arch/sam9x60.h>
+#elif defined(CONFIG_SAMA7G5)
+# include <asm/arch/sama7g5.h>
 #elif defined(CONFIG_SAMA5D2)
 # include <asm/arch/sama5d2.h>
 #elif defined(CONFIG_SAMA5D3)
diff --git a/arch/arm/mach-at91/include/mach/sama7g5.h b/arch/arm/mach-at91/include/mach/sama7g5.h
new file mode 100644
index 0000000000..ae43e8700b
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/sama7g5.h
@@ -0,0 +1,74 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Chip-specific header file for the SAMA7G5 SoC
+ *
+ * Copyright (C) 2020 Microchip Technology, Inc. and its subsidiaries
+ *		      Eugen Hristev <eugen.hristev@microchip.com>
+ */
+
+#ifndef __SAMA7G5_H__
+#define __SAMA7G5_H__
+
+/*
+ * Peripheral identifiers/interrupts.
+ */
+#define ATMEL_ID_FLEXCOM0	38
+#define ATMEL_ID_FLEXCOM1	39
+#define ATMEL_ID_FLEXCOM2	40
+#define ATMEL_ID_FLEXCOM3	41
+
+#define ATMEL_ID_SDMMC0		80
+#define ATMEL_ID_SDMMC1		81
+
+#define ATMEL_ID_PIT64B0	70
+#define ATMEL_ID_PIT64B		ATMEL_ID_PIT64B0
+
+#define ATMEL_CHIPID_CIDR	0xe0020000
+#define ATMEL_CHIPID_EXID	0xe0020004
+/*
+ * User Peripherals physical base addresses.
+ */
+#define ATMEL_BASE_PIOA		0xe0014000
+#define ATMEL_BASE_PIOB		(ATMEL_BASE_PIOA + 0x40)
+#define ATMEL_BASE_PIOC		(ATMEL_BASE_PIOB + 0x40)
+#define ATMEL_BASE_PIOD		(ATMEL_BASE_PIOC + 0x40)
+#define ATMEL_BASE_PIOE		(ATMEL_BASE_PIOD + 0x40)
+
+#define ATMEL_PIO_PORTS		5
+
+#define CPU_HAS_PCR
+
+#define ATMEL_BASE_PMC		0xe0018000
+
+#define ATMEL_BASE_WDT		0xe001c000
+#define ATMEL_BASE_RSTC		0xe001d000
+#define ATMEL_BASE_WDTS		0xe001d180
+#define ATMEL_BASE_SCKCR	0xe001d050
+
+#define ATMEL_BASE_SDMMC0	0xe1204000
+#define ATMEL_BASE_SDMMC1	0xe1208000
+
+#define ATMEL_BASE_PIT64B0	0xe1800000
+
+#define ATMEL_BASE_FLEXCOM0	0xe1818000
+#define ATMEL_BASE_FLEXCOM1	0xe181c000
+#define ATMEL_BASE_FLEXCOM2	0xe1820000
+#define ATMEL_BASE_FLEXCOM3	0xe1824000
+#define ATMEL_BASE_FLEXCOM4	0xe2018000
+
+#define ATMEL_BASE_TZC400	0xe3000000
+
+#define ATMEL_BASE_UMCTL2	0xe3800000
+#define ATMEL_BASE_UMCTL2_MP	0xe38003f8
+#define ATMEL_BASE_PUBL		0xe3804000
+
+#define ATMEL_NUM_FLEXCOM	12
+#define ATMEL_PIO_PORTS		5
+
+#define ATMEL_BASE_PIT64BC	ATMEL_BASE_PIT64B0
+
+#ifndef __ASSEMBLY__
+char *get_cpu_name(void);
+#endif
+
+#endif /* #ifndef __SAMA7G5_H__ */