summaryrefslogtreecommitdiff
path: root/arch/arm/mach-mediatek
diff options
context:
space:
mode:
authorFabien Parent <fparent@baylibre.com>2021-02-15 21:21:11 +0300
committerTom Rini <trini@konsulko.com>2021-03-20 23:24:27 +0300
commit18380437c1475096a9d761f1d0ec86ab397edea1 (patch)
treef83010c8acfbd2f879f38adc29bec947c3df5339 /arch/arm/mach-mediatek
parent21f593214ba2db5fe58c110766ea209e11dbf12d (diff)
downloadu-boot-18380437c1475096a9d761f1d0ec86ab397edea1.tar.xz
ARM: mediatek: Add MT8183 support
Add the MT8183 SoC support. Signed-off-by: Fabien Parent <fparent@baylibre.com>
Diffstat (limited to 'arch/arm/mach-mediatek')
-rw-r--r--arch/arm/mach-mediatek/Kconfig9
-rw-r--r--arch/arm/mach-mediatek/Makefile1
-rw-r--r--arch/arm/mach-mediatek/mt8183/Makefile3
-rw-r--r--arch/arm/mach-mediatek/mt8183/init.c80
4 files changed, 93 insertions, 0 deletions
diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig
index 2791b3dbda..a035471374 100644
--- a/arch/arm/mach-mediatek/Kconfig
+++ b/arch/arm/mach-mediatek/Kconfig
@@ -42,6 +42,15 @@ config TARGET_MT7629
including DDR3, crypto engine, 3x3 11n/ac Wi-Fi, Gigabit Ethernet,
switch, USB3.0, PCIe, UART, SPI, I2C and PWM.
+config TARGET_MT8183
+ bool "MediaTek MT8183 SoC"
+ select ARM64
+ help
+ The MediaTek MT8183 is a ARM64-based SoC with a quad-core Cortex-A73 and
+ a quad-core Cortex-A53. It is including UART, SPI, USB3.0 dual role,
+ SD and MMC cards, UFS, PWM, I2C, I2S, S/PDIF, and several LPDDR3
+ and LPDDR4 options.
+
config TARGET_MT8512
bool "MediaTek MT8512 M1 Board"
select ARM64
diff --git a/arch/arm/mach-mediatek/Makefile b/arch/arm/mach-mediatek/Makefile
index 290d2c709f..0f5b0c16d2 100644
--- a/arch/arm/mach-mediatek/Makefile
+++ b/arch/arm/mach-mediatek/Makefile
@@ -7,5 +7,6 @@ obj-$(CONFIG_MT8512) += mt8512/
obj-$(CONFIG_TARGET_MT7622) += mt7622/
obj-$(CONFIG_TARGET_MT7623) += mt7623/
obj-$(CONFIG_TARGET_MT7629) += mt7629/
+obj-$(CONFIG_TARGET_MT8183) += mt8183/
obj-$(CONFIG_TARGET_MT8516) += mt8516/
obj-$(CONFIG_TARGET_MT8518) += mt8518/
diff --git a/arch/arm/mach-mediatek/mt8183/Makefile b/arch/arm/mach-mediatek/mt8183/Makefile
new file mode 100644
index 0000000000..886ab7e4eb
--- /dev/null
+++ b/arch/arm/mach-mediatek/mt8183/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0
+
+obj-y += init.o
diff --git a/arch/arm/mach-mediatek/mt8183/init.c b/arch/arm/mach-mediatek/mt8183/init.c
new file mode 100644
index 0000000000..877f387102
--- /dev/null
+++ b/arch/arm/mach-mediatek/mt8183/init.c
@@ -0,0 +1,80 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 MediaTek Inc.
+ * Copyright (C) 2021 BayLibre, SAS
+ * Author: Fabien Parent <fparent@baylibre.com>
+ */
+
+#include <clk.h>
+#include <common.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <ram.h>
+#include <asm/arch/misc.h>
+#include <asm/armv8/mmu.h>
+#include <asm/sections.h>
+#include <asm/system.h>
+#include <dm/uclass.h>
+#include <dt-bindings/clock/mt8516-clk.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+ int ret;
+
+ ret = fdtdec_setup_memory_banksize();
+ if (ret)
+ return ret;
+
+ return fdtdec_setup_mem_size_base();
+}
+
+int dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = gd->ram_base;
+ gd->bd->bi_dram[0].size = gd->ram_size;
+
+ return 0;
+}
+
+int mtk_pll_early_init(void)
+{
+ return 0;
+}
+
+int mtk_soc_early_init(void)
+{
+ return 0;
+}
+
+void reset_cpu(ulong addr)
+{
+ psci_system_reset();
+}
+
+int print_cpuinfo(void)
+{
+ printf("CPU: MediaTek MT8183\n");
+ return 0;
+}
+
+static struct mm_region mt8183_mem_map[] = {
+ {
+ /* DDR */
+ .virt = 0x40000000UL,
+ .phys = 0x40000000UL,
+ .size = 0x80000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
+ }, {
+ .virt = 0x00000000UL,
+ .phys = 0x00000000UL,
+ .size = 0x20000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ 0,
+ }
+};
+struct mm_region *mem_map = mt8183_mem_map;