arm: Add support for Actions Semi OWL SoC family

This commit adds Actions Semi OWL SoC family support with S900 as the
first target SoC.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

3 files changed, 41 insertions, 0 deletions

diff --git a/arch/arm/mach-owl/Kconfig b/arch/arm/mach-owl/Kconfig
new file mode 100644
index 0000000000..f695c16d1e
--- /dev/null
+++ b/arch/arm/mach-owl/Kconfig
@@ -0,0 +1,6 @@
+if ARCH_OWL
+
+config SYS_SOC
+	default "owl"
+
+endif
diff --git a/arch/arm/mach-owl/Makefile b/arch/arm/mach-owl/Makefile
new file mode 100644
index 0000000000..1b43dc2921
--- /dev/null
+++ b/arch/arm/mach-owl/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier:	GPL-2.0+
+
+obj-y += sysmap-s900.o
diff --git a/arch/arm/mach-owl/sysmap-s900.c b/arch/arm/mach-owl/sysmap-s900.c
new file mode 100644
index 0000000000..f78b639740
--- /dev/null
+++ b/arch/arm/mach-owl/sysmap-s900.c
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Actions Semi S900 Memory map
+ *
+ * Copyright (C) 2015 Actions Semi Co., Ltd.
+ * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+ */
+
+#include <common.h>
+#include <asm/armv8/mmu.h>
+
+static struct mm_region s900_mem_map[] = {
+	{
+		.virt = 0x0UL, /* DDR */
+		.phys = 0x0UL, /* DDR */
+		.size = 0x80000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+			 PTE_BLOCK_INNER_SHARE
+	}, {
+		.virt = 0xE0000000UL, /* Peripheral block */
+		.phys = 0xE0000000UL, /* Peripheral block */
+		.size = 0x08000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* List terminator */
+		0,
+	}
+};
+
+struct mm_region *mem_map = s900_mem_map;