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| author | Heiko Stuebner <heiko.stuebner@theobroma-systems.com> | 2019-07-16 23:18:21 +0300 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2019-11-17 12:23:24 +0300 |
| commit | e9ccb2f526edab7626abb69b2a6aadcb52510889 (patch) | |
| tree | a2b7ee767417f55dd6594341f8addce0d6ad1ddc /arch/arm/mach-rockchip/px30/Kconfig | |
| parent | 537b1a277479a6dc89e58cce6dfb5966c64f799d (diff) | |
| download | u-boot-e9ccb2f526edab7626abb69b2a6aadcb52510889.tar.xz | |
rockchip: add px30 architecture core
Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'arch/arm/mach-rockchip/px30/Kconfig')
| -rw-r--r-- | arch/arm/mach-rockchip/px30/Kconfig | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/arm/mach-rockchip/px30/Kconfig b/arch/arm/mach-rockchip/px30/Kconfig new file mode 100644 index 0000000000..109a37be15 --- /dev/null +++ b/arch/arm/mach-rockchip/px30/Kconfig @@ -0,0 +1,41 @@ +if ROCKCHIP_PX30 + +config TARGET_EVB_PX30 + bool "EVB_PX30" + +config ROCKCHIP_BOOT_MODE_REG + default 0xff010200 + +config SYS_SOC + default "px30" + +config SYS_MALLOC_F_LEN + default 0x400 + +config SPL_SERIAL_SUPPORT + default y + +config TPL_LDSCRIPT + default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds" + +config TPL_TEXT_BASE + default 0xff0e1000 + +config TPL_MAX_SIZE + default 10240 + +config TPL_STACK + default 0xff0e4fff + +config DEBUG_UART2_CHANNEL + int "Mux channel to use for debug UART2" + depends on DEBUG_UART_BOARD_INIT + default 0 + help + UART2 can use two different set of pins to route the output. + For using the UART for early debugging the route to use needs + to be declared (0 or 1). + +source "board/rockchip/evb_px30/Kconfig" + +endif |