diff options
| author | Paul Kocialkowski <paul.kocialkowski@bootlin.com> | 2019-11-28 17:27:51 +0300 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2019-12-05 18:53:07 +0300 |
| commit | ec4fafdf1ffac38785644d4100d12951a483faac (patch) | |
| tree | 84798ec57a6b0e0887d67db664c741192daafd40 /arch/arm/mach-rockchip/px30 | |
| parent | b0c5e37d0e8aaaadec6298fc7932797b1eb38d9c (diff) | |
| download | u-boot-ec4fafdf1ffac38785644d4100d12951a483faac.tar.xz | |
rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL
UART3 also has two sets of pins that can be selected.
Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'arch/arm/mach-rockchip/px30')
| -rw-r--r-- | arch/arm/mach-rockchip/px30/Kconfig | 6 | ||||
| -rw-r--r-- | arch/arm/mach-rockchip/px30/px30.c | 4 |
2 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-rockchip/px30/Kconfig b/arch/arm/mach-rockchip/px30/Kconfig index 109a37be15..9f3ad4f623 100644 --- a/arch/arm/mach-rockchip/px30/Kconfig +++ b/arch/arm/mach-rockchip/px30/Kconfig @@ -27,12 +27,12 @@ config TPL_MAX_SIZE config TPL_STACK default 0xff0e4fff -config DEBUG_UART2_CHANNEL - int "Mux channel to use for debug UART2" +config DEBUG_UART_CHANNEL + int "Mux channel to use for debug UART2/UART3" depends on DEBUG_UART_BOARD_INIT default 0 help - UART2 can use two different set of pins to route the output. + UART2 and UART3 can use two different set of pins to route the output. For using the UART for early debugging the route to use needs to be declared (0 or 1). diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c index bacdcc0b93..a2241cfc60 100644 --- a/arch/arm/mach-rockchip/px30/px30.c +++ b/arch/arm/mach-rockchip/px30/px30.c @@ -222,7 +222,7 @@ void board_debug_uart_init(void) UART2_CLK_SEL_MASK, UART2_CLK_SEL_UART2 << UART2_CLK_SEL_SHIFT); -#if (CONFIG_DEBUG_UART2_CHANNEL == 1) +#if (CONFIG_DEBUG_UART_CHANNEL == 1) /* Enable early UART2 */ rk_clrsetreg(&grf->iofunc_con0, CON_IOMUX_UART2SEL_MASK, @@ -241,7 +241,7 @@ void board_debug_uart_init(void) GPIO1D3_MASK | GPIO1D2_MASK, GPIO1D3_UART2_RXM0 << GPIO1D3_SHIFT | GPIO1D2_UART2_TXM0 << GPIO1D2_SHIFT); -#endif /* CONFIG_DEBUG_UART2_CHANNEL == 1 */ +#endif /* CONFIG_DEBUG_UART_CHANNEL == 1 */ #endif /* CONFIG_DEBUG_UART_BASE && CONFIG_DEBUG_UART_BASE == ... */ } |