diff options
| author | Ley Foon Tan <ley.foon.tan@intel.com> | 2019-11-08 05:38:20 +0300 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2020-01-07 16:38:33 +0300 |
| commit | db5741f7a85ec3ee79b64496172afaa7dc2cb225 (patch) | |
| tree | 20f749d41ff3c329758f16c1a67f9c5772f35278 /arch/arm/mach-socfpga/spl_s10.c | |
| parent | bb25aca1343304e0334e9eebfb9d350eaf276882 (diff) | |
| download | u-boot-db5741f7a85ec3ee79b64496172afaa7dc2cb225.tar.xz | |
arm: socfpga: Convert system manager from struct to defines
Convert system manager for Gen5, Arria 10 and Stratix 10 from struct
to defines.
Change to get system manager base address from DT node instead of
using #define.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Diffstat (limited to 'arch/arm/mach-socfpga/spl_s10.c')
| -rw-r--r-- | arch/arm/mach-socfpga/spl_s10.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/spl_s10.c index 5859973ba8..028c5a177d 100644 --- a/arch/arm/mach-socfpga/spl_s10.c +++ b/arch/arm/mach-socfpga/spl_s10.c @@ -22,9 +22,6 @@ DECLARE_GLOBAL_DATA_PTR; -static struct socfpga_system_manager *sysmgr_regs = - (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS; - u32 spl_boot_device(void) { /* TODO: Get from SDM or handoff */ @@ -129,7 +126,8 @@ void board_init_f(ulong dummy) #ifdef CONFIG_HW_WATCHDOG /* Ensure watchdog is paused when debugging is happening */ - writel(SYSMGR_WDDBG_PAUSE_ALL_CPU, &sysmgr_regs->wddbg); + writel(SYSMGR_WDDBG_PAUSE_ALL_CPU, + socfpga_get_sysmgr_addr() + SYSMGR_S10_WDDBG); /* Enable watchdog before initializing the HW */ socfpga_per_reset(SOCFPGA_RESET(L4WD0), 1); @@ -157,8 +155,10 @@ void board_init_f(ulong dummy) cm_print_clock_quick_summary(); /* enable non-secure interface to DMA330 DMA and peripherals */ - writel(SYSMGR_DMA_IRQ_NS | SYSMGR_DMA_MGR_NS, &sysmgr_regs->dma); - writel(SYSMGR_DMAPERIPH_ALL_NS, &sysmgr_regs->dma_periph); + writel(SYSMGR_DMA_IRQ_NS | SYSMGR_DMA_MGR_NS, + socfpga_get_sysmgr_addr() + SYSMGR_S10_DMA); + writel(SYSMGR_DMAPERIPH_ALL_NS, + socfpga_get_sysmgr_addr() + SYSMGR_S10_DMA_PERIPH); spl_disable_firewall_l4_per(); |