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| author | Patrick Delaunay <patrick.delaunay@st.com> | 2020-07-24 12:21:51 +0300 |
|---|---|---|
| committer | Patrice Chotard <patrice.chotard@st.com> | 2020-07-28 18:21:37 +0300 |
| commit | 43fe9d2fda24ea56a1ff35ecc02a6a93f795c1c0 (patch) | |
| tree | a71760cdfeed65ab222664574c7b28faec516064 /arch/arm/mach-stm32mp/cpu.c | |
| parent | 97f7e39def44439789fed911850a0d687c3da3e9 (diff) | |
| download | u-boot-43fe9d2fda24ea56a1ff35ecc02a6a93f795c1c0.tar.xz | |
stm32mp1: mmu_set_region_dcache_behaviour
Since commit d877f8fd0f09 ("arm: provide a function for boards init
code to modify MMU virtual-physical map") the parameter of
mmu_set_region_dcache_behaviour need to be MMU_SECTION_SIZE
aligned.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'arch/arm/mach-stm32mp/cpu.c')
| -rw-r--r-- | arch/arm/mach-stm32mp/cpu.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index 56092c8bf6..b7fcee2b36 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -225,9 +225,10 @@ static void early_enable_caches(void) dcache_enable(); if (IS_ENABLED(CONFIG_SPL_BUILD)) - mmu_set_region_dcache_behaviour(STM32_SYSRAM_BASE, - STM32_SYSRAM_SIZE, - DCACHE_DEFAULT_OPTION); + mmu_set_region_dcache_behaviour( + ALIGN(STM32_SYSRAM_BASE, MMU_SECTION_SIZE), + round_up(STM32_SYSRAM_SIZE, MMU_SECTION_SIZE), + DCACHE_DEFAULT_OPTION); else mmu_set_region_dcache_behaviour(STM32_DDR_BASE, STM32_DDR_SIZE, DCACHE_DEFAULT_OPTION); |